Analog Devices SSM2319 Manual Download Page 14

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SSM2319

Rev. 0 | Page 13 of 20

755

OUT+

STANDALONE

MASTER

SLAVE

OUT–

MODULATOR

(

)

SYNCI

SYNCO

SYNC

INPUT

SYNC

OUTPUT

SSM2319

FET

DRIVER

SYNC

INTERNAL

OSCILLATOR

OUT+

OUT–

MODULATOR

(

)

SYNCI

TO SLAVE

NOTES

1. TRACE LENGTH FROM SYNCI TO SYNCO IS LESS THAN 1mm.

SYNCO

SYNC

INPUT

SYNC

OUTPUT

SSM2319

FET

DRIVER

SYNC

INTERNAL

OSCILLATOR

OUT+

OUT–

MODULATOR

(

)

SYNCI

FROM MASTER

SYNCO

SYNC

INPUT

SYNC

OUTPUT

SSM2319

FET

DRIVER

SYNC

INTERNAL

OSCILLATOR

Figure 34. Synchronization Operation Modes

755

OUT+

SLAVE 1

MASTER

SLAVE 2

OUT–

MODULATOR

(

)

SYNCI

SYNCO

SYNC

INPUT

SYNC

OUTPUT

SSM2319

FET

DRIVER

SYNC

INTERNAL

OSCILLATOR

OUT+

OUT–

MODULATOR

(

)

SYNCI

SYNCO

SYNC

INPUT

SYNC

OUTPUT

SSM2319

FET

DRIVER

SYNC

INTERNAL

OSCILLATOR

OUT+

OUT–

MODULATOR

(

)

SYNCI

SYNCO

SYNC

INPUT

SYNC

OUTPUT

SSM2319

FET

DRIVER

SYNC

INTERNAL

OSCILLATOR

Figure 35. Typical SYNC Master-Slave Daisy-Chain Configuration

Summary of Contents for SSM2319

Page 1: ...ngle 2 5 V to 5 5 V supply It is capable of delivering 3 W of continuous output power with 1 THD N driving a 3 load from a 5 0 V supply The SSM2319 features a high efficiency low noise modulation sche...

Page 2: ...prints DISCUSSIONS View all ssm2319 EngineerZone Discussions SAMPLE AND BUY Visit the product page to see pricing options TECHNICAL SUPPORT Submit a technical question or find your regional support nu...

Page 3: ...on 5 Pin Configuration and Function Descriptions 6 Typical Performance Characteristics 7 Typical Application Circuits 12 Theory of Operation 14 Overview 14 Gain 14 Pop and Click Suppression 14 Output...

Page 4: ...kHz BW VDD 2 5V 0 85 W Efficiency POUT 1 4 W 8 VDD 5 0 V 93 Total Harmonic Distortion Noise THD N POUT 1W into 8 f 1 kHz VDD 5 0V 0 06 POUT 0 5W into 8 f 1 kHz VDD 3 6V 0 02 Input Common ModeVoltage R...

Page 5: ...se en VDD 3 6V f 20 Hz to 20 kHz inputs are ac grounded AV 12 dB A weighting 40 V Signal to Noise Ratio SNR POUT 1 4 W RL 8 98 dB SYNC OPERATIONAL FREQUENCY 5 12 MHz 1 Although the SSM2319 has good au...

Page 6: ...hose listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicat...

Page 7: ...A 3 2 1 B C 07550 002 Figure 2 Pin Configuration Table 4 Pin Function Descriptions Pin No Mnemonic Description 1A IN Inverting Input 1B IN Noninverting Input 1C GND Ground 2A SD Shutdown Input Active...

Page 8: ...10 100 0 0001 0 001 0 01 0 1 1 10 07550 004 OUTPUT POWER W THD N RL 4 33 H GAIN 12dB 10 100 1k 10k 100k 0 001 0 01 0 1 1 10 100 07550 007 FREQUENCY Hz THD N RL 4 33 H GAIN 12dB VDD 5V 1W 0 5W 2W Figu...

Page 9: ...D N RL 3 33 H GAIN 12dB VDD 3 6V 0 75W 0 38W 1 5W Figure 11 THD N vs Frequency RL 3 33 H Gain 12 dB VDD 3 6 V 10 100 1k 10k 100k 0 001 0 01 0 1 1 10 100 07550 012 FREQUENCY Hz THD N RL 8 33 H GAIN 12d...

Page 10: ...CONTINUOUS OUTPUT POWER 07550 017 SUPPLY VOLTAGE V OUTPUT POWER W Figure 17 MaximumOutputPowervs SupplyVoltage RL 4 33 H Gain 12dB 0 0 2 0 4 0 6 0 8 1 0 1 2 1 4 1 6 1 8 2 0 2 5 3 0 3 5 4 0 4 5 5 0 10...

Page 11: ...23 OUTPUT POWER W POWER DISSIPATION W VDD 5V VDD 2 5V VDD 3 6V RL 4 33 H Figure 23 Power Dissipation vs Output Power into RL 4 33 H 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 0 5 1 0 1 5 2 0 2 5 3 5 3 0...

Page 12: ...D INPUT Figure 27 Supply Current vs Output Power into RL 3 33 H Figure 30 Turn On Response 100 90 80 70 60 50 40 30 20 10 0 10 100 1k 10k 100k 07550 028 FREQUENCY Hz PSRR dB 2 1 0 1 2 3 4 5 6 7 100 80...

Page 13: ...PPROXIMATELY VDD 2 SD SSM2319 40k 160k 160k 40k FET DRIVER BIAS INTERNAL OSCILLATOR SYNCI SYNCO SYNC INPUT SYNC Figure 32 Differential Input Configuration User Adjustable Gain 0 1 F VBATT 2 5V TO 5 5V...

Page 14: ...MODULATOR SYNCI FROM MASTER SYNCO SYNC INPUT SYNC OUTPUT SSM2319 FET DRIVER SYNC INTERNAL OSCILLATOR Figure 34 Synchronization Operation Modes 07550 036 OUT SLAVE 1 MASTER SLAVE 2 OUT MODULATOR SYNCI...

Page 15: ...of current flows into the inductive load when the differential pulse is generated However most of the time the output differential voltage is 0 V due to the Analog Devices Inc patented 3 level output...

Page 16: ...UPLING To ensure high efficiency low THD and high PSRR proper power supply decoupling is necessary Noise transients on the power supply lines are short duration voltage spikes Although the actual swit...

Page 17: ...wn in Figure 37 07550 037 SD REF MOD SYNCI SYNCO MCLK INTERNAL SIGNAL SYNCI GND Figure 39 SYNCI External Clock SYNCI GND transitions to clock When the SYNCI pin is connected to GND first but then tran...

Page 18: ...e 42 9 Ball Wafer Level Chip Scale Package WLCSP CB 9 2 Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option SSM2319CBZ R21 40 C to 85 C 9 Ball Waf...

Page 19: ...SSM2319 Rev 0 Page 18 of 20 NOTES...

Page 20: ...SSM2319 Rev 0 Page 19 of 20 NOTES...

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