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ADuC814 Evaluation Board Reference Guide
Version 1.0 (5/1/02)
Page 4 of 10
2.0 E
VALUATION
B
OARD
F
EATURES
Power Supply:
The user should connect the 9V battery via J1(-) and J1(+). The 9V supply is regulated via a linear
voltage regulator (U1). The 5V regulator output being used to drive the rest of the board directly.
Alternatively a 9V supply can be fed to the board via the 2.1mm input power socket (J2). The input
connector is configured as ‘CENTER NEGATIVE’ i.e. GND on the center pin and +9V on the outer
shield.
When on, the green LED (D5) indicates that a valid 5V supply is being driven from the regulator
circuit.
All active components are decoupled with 0.1uF at device supply pins to ground.
RS232 Interface:
The ADuC814 (U2) TXD and RXD lines are connected to the RS232 Interface Cable via connector
(J4). The Interface Cable generates the required level shifting to allow direct connection to a PC serial
port. This interface will be the main channel of interactive comms on the board. Ensure that the cable
supplied is connected to the board correctly i.e. DVDD is connected to DVDD and GND is connected
to GND.
Emulation Interface:
Single pin non-intrusive emulation is possible using the ADuC814 by connecting an emulator to the
DLOAD pin. J5 allows direct connection to the emulator board.
External Data Memory Interface:
The Evaluation board incorporates 8K x 8 SPI FRAM (U3). The 3 wire interface to this memory is SPI
Mode 0 and Mode 3 compatible. The FRAM is active by default but may be disabled by removing the
zero ohm resistor R8.
Analog I/O Connections:
Analog input signals can be applied to the ADuC814 via connector J7. ADC analog input channels 0
and 1 are buffered and filtered with a first order RC. The ADC4/DAC0 channel, has a buffer which is
set up for DAC mode. If using this analog I/O as an input the buffer should be removed from the
circuit. ADC3 and ADC5/DAC1 channels have direct connection from J7 to the ADuC814.
Crystal Circuit:
The board is fitted with a 32.768kHz crystal, from which the on-chip PLL circuit generates a 16.78
MHz clock.
On-Chip Band Gap Reference Buffer:
A buffered version of the on-chip voltage reference is provided on J7. This voltage is taken from the
CREF pin. The internal reference can be bypassed by connecting Vref and Cref inputs together via
solder bridge B1 and connecting the external reference to the Vref input. On the device, setting the
ADCCON1.6 bit allows the internal reference to be bypassed.
