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4
MAX98365 Evaluation Systems
Evaluates: MAX98365A/MAX98365B/
MAX98365C/MAX98365D
Gain and Channel Selection
(I
2
S/Left-Justified Mode)
The MAX98365’s GAIN_SLOT pin is connected to the
center pin (pin 1) of the J7 header. When operating the
device in I
2
S or left-justified mode, shunting pin 1 to the
adjacent pins of the J7 header controls the PCM gain.
Table 4
shows the available gain settings in I
2
S and left-
justified modes.
In I
2
S and left-justified modes, channel selection is con-
trolled by placing three shunts across the DAI configura-
tion headers J3, J4, or J5. Each of the DAI configuration
headers represent one valid mapping of the DAI pins to
the PCM input signals. See
Table 5
for the valid jumper
settings for the DAI configuration headers. Only one DAI
configuration may be used at a time.
Figure 3
shows the
shunt positions used for DAI configuration A.
Channel Selection (TDM Mode)
In TDM mode, the MAX98365 has a fixed gain of 21.5dB
and the GAIN_SLOT pin becomes repurposed for TDM
channel selection. The MAX98365 accepts 8-channel
TDM data with either 16-bit or 32-bit data. The GAIN_
SLOT pin and DAI configuration are used to select which
of the 8 channels of TDM data the part responds to, as
shown in
Table 6
.
Table 4. J7 Jumper Selection
(GAIN_SLOT)
Table 5. J3-J5 Header Selection
(DAI Configuration)
Figure 3. DAI Configuration A (Left-Channel for I2S/Left-
Justified Operation)
GAIN (dB)
J7 SHUNT
POSITION
GAIN_SLOT
21.5
1-5
Connected to GND
18.5
Not Installed
Unconnected
15.5
1-3
Connected to VDD
12.5
1-2
Connected to VDD through
100kΩ resistor R1
9.5
1-4
Connected to GND through
100kΩ resistor R2
I
2
S/LJ CHANNEL
SHUNT
HEADER
DAI
CONFIGURATION
Left
J3
A
Right
J4
B
Mono-mix
(Left/2 + Right/2)
J5
C
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