Analog Devices EZ-KIT Lite ADSP-BF533, Manual, Page: 46 / 108

Using Flash Memory
2-6 ADSP-BF533 EZ-KIT Lite Evaluation System Manual
Example code is provided in the EZ-KIT installation directory to demon-
strate how to program the Flash memory as well as to demonstrate the
functionality of the general-purpose IO pins.
Flash Memory Map
Each device includes the following memory segments:
• 1M byte of primary Flash memory
• 64K bytes of secondary Flash memory
• 32 Kbytes of internal SRAM
• 256 Bytes of configuration registers (IO control)
Access to each segment can be 8-bit or 16-bit. The processor’s
~AMS0
,
~AMS1
, and
~AMS2
memory select pin are used for that purpose. Asynchro-
nous memory Bank 0 is always enabled after a hard reset, while Banks 1
and 2 need to be enabled by software.
Table 2-4 provides an example on
asynchronous memory configuration registers.
Each Flash chip is initially configured with the memory sectors mapped
into the processor’s address space as shown in
Table 2-5 .
Table 2-4. Asynchronous Memory Control Registers Settings Example
Register Value Function
EBIU_AMBCTL0 0x7BB07BB0
Timing control for Banks 1 and 0
EBIU_AMBCTL1
bits 15-0
0x7BB0
Timing control for Bank 2 (Bank 3 is not used)
EBIU_AMGCTL
bits 3-0
0xF
Enable all banks