UG-543
Evaluation Board User Guide
Rev. 0 | Page 4 of 16
Table 2. Jumper Configuration
Purpose
Half-Duplex
Board
Full-Duplex
(8-Lead) Board
Full-Duplex
(14-Lead) Board
Connection Description
Select RE Input
LK1
N/A
LK2
A
Connects RE to VCC (disables receiver output).
B
Connects RE to GND (enables receiver output).
C
Allows RE input from screw terminal block.
D
Connects RE to DE input source.
Select DE Input
LK2
N/A
LK3
A
Connects DE to VCC (enables driver outputs).
B
Connects DE to GND (disables driver outputs).
C
Allows DE input from screw terminal block.
Connect RT1
LK3
N/A
N/A
Closed
RT1 is connected across A and B.
Open
RT1 is disconnected.
Connect RT2
LK4
N/A
N/A
Closed
RT2 is connected across A and B.
Open
RT2 is disconnected.
Connect A to Y
N/A
LK1
LK5
Closed
A is connected to Y.
Open
A is not connected to Y.
Connect B to Z
N/A
LK2
LK6
Closed
B is connected to Z.
Open
B is not connected to Z.
OTHER BOARD COMPONENTS
All three boards include footprints for termination resistors
(RT1 and/or RT2) as well as pull-up and pull-down resistors.
Termination resistors of 120 Ω are fitted to the board; these may
be removed or replaced with a different value resistor as needed.
Full-duplex boards can be evaluated with A connected to Y and
B connected to Z (see Table 2). In this configuration, the two
termination resistors are in parallel, so the driver can be
evaluated with a load equivalent to a bus terminated at both ends.
For the half-duplex board, the same effect is achieved by
connecting in two parallel termination resistors using jumpers
on the board. Refer to Table 2 for jumper connections.
Biasing Resistors for Bus-Idle Failsafe
Pull-up and pull-down resistors are not fitted by default, but
may be required to provide an external biasing network for an
idle bus failsafe. These resistors are usually only connected at
one position on the bus and selected to provide a minimum
differential input voltage (V
ID
) between A and B of 200 mV.
Different resistor values are required depending on whether
a 3.3 V or 5 V supply is used, and how much noise margin is
required (that is, V
ID
> 200 mV).
ADM3070E
to
ADM3078E
and
ADM4850
to
ADM4857
have built-in failsafe for the bus
idle condition. For guidelines, refer to
AN-960 Application
Note
,
RS-485/RS-422 Circuit Implementation Guide
.
EVALUATION WITH APPLICATIONS
Full-Duplex RS-485 Transceiver Loopback
For full-duplex transceivers using the
EVAL-RS485FDEBZ
or
EVAL-RS485FD8EBZ
boards, a loopback test can be set up by
closing LK5 and LK6 or LK1 and LK2, respectively. This test
is shown in Figure 4.
A signal generator is connected to DI and this allows
verification of the bus signals and the receiver output. Note
the jumper positions of LK3 (A) and LK2 (B) for the
EVAL-
RS485FDEBZ
board. In this configuration, the default
termination resistors can be used since both 120 Ω resistors
on the board will be connected in parallel by the loop-back,
ensuring the test is conducted with a standard RS-485 load of
60 Ω (bus terminated at both ends by 120 Ω).
Half-Duplex RS-485 Transceivers Point-to-Point Test
With two boards, a point-to-point test can be set up. Two half-
duplex boards are shown in this configuration in Figure 5.
Note the positions of LK1 and LK2 on each board to enable
the driver on one board and the receiver on the other board.
For
EVAL-RS485FDEBZ
, these correspond to LK2 and LK3,
although in this case, both boards can have the driver and
receiver enabled if LK5 and LK6 are open and a four-wire
connection is used. For
EVAL-RS485FD8EBZ
boards, LK1 and
LK2 must be open with a four-wire connection for the point-to-
point link.
LK4 has been removed on each
EVAL-RS485HDEBZ
board in
order to ensure both ends of the bus have only a 120 Ω load.
For full-duplex boards with a four-wire connection, the correct
termination is on each end of the bus. If
EVAL-RS485FDEBZ
boards are used with a two-wire connection and LK5 and LK6
are closed, then one termination resistor needs to be removed
from each board.
