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EVAL-ADP5020 

 

Rev. 0 | Page 11 of 24 

The 

Registers MAP

 button, when clicked, activates another 

method to read and write the ADP5020 registers, as shown in 
Figure 19. 

The register values, previously set, are transferred into the 

Register 

MAP

 window. You have the choice to modify the registers bitwise 

by clicking the desired bit position. The bit value then switches 
from 0 to 1, or vice versa. It is not possible to change the values 
for the grayed bits. The register values can also be changed by 
entering a hexadecimal value in the text box for the respective 
register (for example, 4C is entered for Register 0x00 in Figure 19)
The 

Hex/Dec

 button allows you to change the data format of 

the register values from hexadecimal to decimal, or vice versa. 
Binary and Byte controls are intercommunicating; therefore, 
changes to one control are automatically reflected in the other. 
The 

R

 and 

W

 buttons next to each register allow reading or writing 

a specific device address, and the 

Read ALL

 and 

Write

 

ALL

 

buttons allows you to read or write the entire register map from 
or to the ADP5020 under evaluation. The 

OK/Fail

 indicator 

next to these two buttons shows the operation result. Click 

EXIT

 

to return in the main window. The modified registers are then 
transferred automatically into the 

USER REGISTER

 section of 

the GUI window. 

The register map utility does not have the 

Smart Update

 

option; therefore, a new value is written into the ADP5020 
following a write operation (by clicking the 

W

 or 

Write ALL 

buttons). 

REGISTER COMMAND OPTIONS 

The 

Regs Refresh

 check box, when selected, enables the 

program to read the device statuses periodically. The refresh 
time is programmable in the 

Refresh Rate

 box from 100 ms to 

10 sec. The registers read during the refresh are Register 0x00, the 
revision register, Register 0x03 (BK1_PGOOD, BK2_PGOOD, 
and LDO_PGOOD), and Register 0x04 (TSD), providing a real-
time indication of the device functionality. If a thermal shutdown 
event is detected, you must disable the register refresh option 
(clear the 

Regs Refresh

 check box) to clear the TSD flag. The 

Access

 blue indicator, when lit up, indicates that the refresh 

operation is taking place.  

The 

Smart Update 

check box, when selected, enables the pro-

gram to automatically write an ADP5020 register when a 

USER 

REGISTER

 option has been changed. This avoids the need to click 

the 

Write Registers

 button every time a value is changed. The 

Smart Update

 check box must be cleared if you want to control the 

write operations. 

 

07794-

019

 

Figure 19. Register MAP Utility 

 

Summary of Contents for EVAL-ADP5020

Page 1: ...TURES Input voltage 2 4 V to 5 5 V Evaluates three regulators Buck 1 Buck 2 and LDO USB to I2 C interface translation Jumpers for input current measurement of regulators Supports EN SYNC and XSHTDWN pin interface Evaluation software included GENERAL DESCRIPTION The evaluation system is composed of a motherboard and a daughterboard The motherboard provides the I2 C signals from the computer USB por...

Page 2: ... 8 Program Run Turn On Sequence 10 Program Run Turn Off Sequence 10 Registers Commands 10 Register Command Options 11 Load Save Registers Configuration 12 Additional Commands 12 Warning 12 History 12 Evaluation Board Overview 13 Motherboard 13 Daughterboard 14 Evaluation Board Schematics 16 Motherboard Schematics 16 Daughterboard Schematic 18 PCB Layout 19 Ordering Information 21 Bill of Materials...

Page 3: ...oot the PC to complete the operation if necessary Note that if the PC already has LabVIEW installed this step is not needed 4 Launch the file Setup exe When the dialog box shown in Figure 2 appears click Next to continue 07794 002 Figure 2 ADP5020 Evaluation Software Setup 5 Click Yes to accept the license agreement 07794 003 Figure 3 License Agreement 6 Click Next to install the files to the defa...

Page 4: ...install the program to the default program folder 07794 006 Figure 6 Select Program Folder 9 Wait while the program installs 07794 007 Figure 7 Setup Status 10 Click Finish to complete the installation 07794 008 Figure 8 InstallShield Wizard Complete ...

Page 5: ... Wizard 3 Click Continue Anyway and then Finish to complete the driver installation 07794 010 Figure 10 Hardware Installation 4 Open the Device Manager and check that the USB driver is installed properly 07794 011 Figure 11 Check Driver Installation When the USB cable is connected to a PC port different from the one used to install the driver the PC device driver may ask to install the driver agai...

Page 6: ...al user interface GUI appears as shown in Figure 13 The program default settings are as follows All registers initialized to zero Software turn on sequence is Buck 1 first Buck 2 second LDO third Delay between activations is 1000 ms Software turn off sequence is LDO first Buck 2 second Buck 1 third Delay between activations is 1000 ms Regs Refresh check box is cleared status registers are not read...

Page 7: ...ADP5020 Rev 0 Page 7 of 24 CLOSE APPLICATION 07794 013 READ DEVICE REGISTERS WRITE DEVICE REGISTERS VIEW MODIFY REGISTERS CREATE SOFTWARE SEQUENCING ENABLE CONTEXT HELP STOP APPLICATION Figure 13 ADP5020 GUI ...

Page 8: ...e current values To facilitate operation all the possible device configurations are listed in the drop down boxes You can select the desired value then program the device by clicking the Write Registers button If the Smart Update check box is selected default condition as soon as a register value is changed the application sends a programming command for that specific register without the need to ...

Page 9: ...ox shows the power good status for the Buck 2 regulator If the check box is selected the Buck 2 regulator is operating correctly if cleared it indicates that the Buck 2 regulator is either not activated or in a failing condition This check box corresponds to BK2_PGOOD Bit 2 in the REG_CONTROL_STATUS register Address 0x03 The LDO PGOOD check box shows the power good status for the LDO regulator If ...

Page 10: ...nnot be changed The software automatically sets the XSHTDN masking bit if the regulators are set to None Although unnecessary it is possible to create a sequence where all the regulators are set to None that is all disabled Once a sequence is started you can verify the PGOOD and TSD device status under Buck 1 PGOOD Buck 2 PGOOD LDO PGOOD and Thermal Shutdown in the USER REGISTER section of the GUI...

Page 11: ...on result Click EXIT to return in the main window The modified registers are then transferred automatically into the USER REGISTER section of the GUI window The register map utility does not have the Smart Update option therefore a new value is written into the ADP5020 following a write operation by clicking the W or Write ALL buttons REGISTER COMMAND OPTIONS The Regs Refresh check box when select...

Page 12: ...ressing CTRL H Moving the pointer over a control option or indicator displays information related to it in the context help window WARNING Upon starting the ADP5020 application a dedicated firmware is loaded into the adapter board processor Cypress IC This firmware is needed for the operation of the USB adapter and communication with the ADP5020 daughterboard If the evalua tion board is not connec...

Page 13: ...press CY7C68013A is not rated at 40 C The 8 pin Header J10 on the top of the motherboard can be used to connect external supplies The VBATT OKAY VDDIO OKAY and VBOARD OKAY LEDs located at the top left of the board lights up when the board is powered from the USB cable or when external supplies are connected to J10 and Jumper LK8 to Jumper LK10 are set in the EXT position It is possible to choose s...

Page 14: ...awn from the battery therefore short thick cables are recommended to minimize the IR drops A high current can cause a big IR drop and VBATT can be low enough to put the part into UVLO INPUT SUPPLIES AND REGULATORS OUTPUTS VDD2 INPUT SELECTION AND CURRENT MEASUREMENT VDD1 INPUT CURRENT MEASUREMENT LOOP MEASUREMENT PORT EN GPIO SELECTION FORCED INTERNALLY OR EXT I OS SIGNALS AND KELVIN MEASUREMENTS ...

Page 15: ...due to IR drop from the trace resistance Table 2 and Table 3 show the signals available on Connector J6 and Connector J5 respectively Power Board from USB Port Only To power the board via the USB without using an external supply short Jumper LK10 on the motherboard USB position Avoid exceeding the 500 mA current limit of the USB Table 2 Measurement Signals on J6 Signal J6 Pins Description EN GPIO ...

Page 16: ...TP22 3 AGND 1B GND1 1A GND2 7A VO3B 9A GND4 2B VO2B 16A VO2B 18A VO1B 6A VO1B 4A U8 M24AA64 R U8 A0 A1 A2 VSS SDA SCL WP VCC R19 100k R19 100k U4 CY7C68013A U4 RDY0 SLRD 1 RDY1 SLWR 2 AVCC1 3 XTALOUT 4 XTALIN 5 AGND1 6 AVCC2 7 D 8 D 9 AGND2 10 VCC1 11 GND1 12 IFCLK 13 RES 14 SCL 15 SDA 16 VCC2 17 PB0 FD0 18 PB1 FD1 19 PB2 FD2 20 PB3 FD3 21 PB4 FD4 22 PB5 FD5 23 PB6 FD6 24 PB7 FD7 25 GND2 26 VCC3 2...

Page 17: ... Way Link 1 3 2 R1 680 R1 680 TP9 TP9 1 R30 1M R30 1M R13 680 R13 680 C1 10uF C1 10uF R34 1M R34 1M R31 1M R31 1M TP2 TP2 1 TP4 TP4 1 U113 ADCMP600 U113 ADCMP600 3 4 1 5 2 R33 2 2K R33 2 2K G S D Q3 FDN335N G S D Q3 FDN335N C2 0 1uF C2 0 1uF TP5 TP5 1 G S D Q4 FDN335N G S D Q4 FDN335N D1 LED D1 LED R36 0 R36 0 D22 BAT54TW 7 F D22 BAT54TW 7 F A1 1 A2 2 A3 3 K3 4 K2 5 K1 6 G S D Q6 FDN335N G S D Q6 ...

Page 18: ...5020_LFCSP VOUT1A 15 SW1 17 PGND1 16 VOUT1B 14 SW2 20 VOUT2 2 PGND2 1 VANA 12 XSHTDWN 10 AGND 4 DGND 6 VDDA 3 VDD1 18 VDD2 19 VDD3 13 VDD_IO 9 SDA 7 SCL 8 SYNC 5 EN GPIO 11 J5 HEADER 10X2 J5 HEADER 10X2 2 4 6 8 10 12 14 16 18 20 1 3 5 7 9 11 13 15 17 19 JP1 INTF JP1 INTF 1 1 2 2 3 3 C3 4 7UF C3 4 7UF JP3 INTF JP3 INTF 1 1 2 2 3 3 L3 2 2uH L3 2 2uH L1 2 2uH L1 2 2uH C4 1UF C4 1UF R5 49 9 R5 49 9 R1...

Page 19: ...EVAL ADP5020 Rev 0 Page 19 of 24 PCB LAYOUT Evaluation Board Layout 07794 028 Figure 28 Top Layer 07794 029 Figure 29 Inner Layer 1 07794 030 Figure 30 Inner Layer 2 07794 031 Figure 31 Bottom Layer ...

Page 20: ...EVAL ADP5020 Rev 0 Page 20 of 24 Motherboard Layout 07794 032 Figure 32 Top Layer 07794 033 Figure 33 Inner Layer 1 07794 034 Figure 34 Inner Layer 2 07794 035 Figure 35 Bottom Layer ...

Page 21: ...M21BR60J106K Capacitor MLCC 6 2 pF 0402 NP0 C10 C16 2 Vishay Panasonic ECJ OEC1H0600 Capacitor MLCC 2 2 μF 10 V 0603 X5R C14 C15 C17 C18 C19 C20 C23 C24 8 Murata Manufacturing Co Ltd GRM188R61A225K Capacitor MLCC 47 μF 6 3 V 1206 X5R C25 1 Murata Manufacturing Co Ltd GRM32ER61C476K Red LED 0402 SMD D4 D19 D21 3 Lumex Inc SML LX0402SIC TR Green LED 0402 SMD D1 D5 D20 3 Lumex Inc SML LX0402SUGC TR W...

Page 22: ...USB Mini B 5p JP1 1 Delphi Corporation Molex 15430262 110 Header Male 0 100 Dual STR 2 10 Pins M1 2 Sullins Connector Solutions PTC10SAAN Header 0 100 Single STR 3 Pins LK8 LK9 LK10 LK11 LK12 5 Sullins Connector Solutions PEC03SAAN Header 0 100 Single STR 4 Pins J10 1 Sullins Electronics Inc PEC36SAAN SMB Connector Receptacle SM2 1 Emerson Network Power Connectivity Solution 131 3701 266 ORDERING ...

Page 23: ...EVAL ADP5020 Rev 0 Page 23 of 24 NOTES ...

Page 24: ...EVAL ADP5020 Rev 0 Page 24 of 24 NOTES 2009 Analog Devices Inc All rights reserved Trademarks and registered trademarks are the property of their respective owners EB07794 0 5 09 0 ...

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