User Guide
EVAL-ADMV8526
PERFORMING EVALUATION
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AUTOMATIC CHIP RESET
If a reset of the
ADMV8526
chip is required on the ADMV8526-
EVALZ, click
Reset Chip
(see
Figure 7
, Label J3, and
Table 1
for additional information). This automated sequence performs the
following actions:
►
Toggles all
SDP-S
general-purpose input and output (GPIO) log-
ic pins to a low state, which brings the RST pin of the ADMV8526
low to initiate a hard reset of the ADMV8526.
►
Toggles the RST pin high to bring the ADMV8526 chip back to
the normal operating state.
►
Programs Register 0x000 to 0x81, which also resets the
ADMV8526. This step covers legacy boards that did not have
the RST pin connected.
►
Programs Register 0x000 to 0x3C to enable the SDO pin on
the ADMV8526 and to allow SPI streaming with Endian register
ascending order.
►
Reads back the register settings of the ADMV8526.
MANUAL CHIP RESET
For manual reset operations, the following outlines two ways to
perform a reset:
►
The RST pin can also be pulled low from within the
ACE
software by unchecking the
RSTB
check box in the lower right
corner of
Figure 7
(see Label G). When using this option, be sure
to click the check box again to return the RST pin high.
►
Register 0x000 can be programmed to 0x81 to initiate a reset of
the ADMV8526.
Regardless of the manual reset option used, it is recommended to
perform the following after the device resets:
►
Programs Register 0x000 to 0x3C to enable the SDO pin on
the ADMV8526 and to allow SPI streaming with Endian register
ascending order.
►
Read back all registers on the ADMV8526.
LOSS OF BOARD COMMUNICATION
When the ADMV8526 is turned off and then on, or if the USB
cable is disconnected and connected while the ACE software is
running, communication with the ADMV8526 may be lost. To regain
communication, take the following steps:
1.
Click the
System
tab.
2.
Click the USB symbol in the
SDP-S Controller
subsystem.
3.
Click
Acquire
.
If this action does not work, restart the ACE software to reinitiate
communication with the ADMV8526-EVALZ.
REGULATOR BYPASS
The ADMV8526-EVALZ has a negative voltage generator and three
LDO regulators on board that allow the user to operate the device
using the 5 V USB supply voltage from the PC via the SDP-S. By
default, the provisional 2.5 V LDO regulator, U3, is not installed
because the ADMV8526 has a built-in LDO regulator for that
supply voltage. The other two on-board LDO regulators, U2 and
U5, provide the necessary supply voltages of +3.3 V and −2.5 V,
respectively. If desired, these two LDO regulators can be bypassed
by removing the 0 Ω resistors (R23 and R32) from the ADMV8526-
EVALZ and then by applying each voltage independently by using
the corresponding test points. Bypassing the on-board regulators
is useful for measuring the ADMV8526 supply current, but it must
be noted that each supply pin is also connected to status indicator
LEDs, DS1 to DS3, and each LED draws approximately 2 mA of
current. Remove the R2, R3, and R91 resistors to disable these
status indicators. See
Figure 12
and
Figure 13
for more details.
PLUG-IN SPI REGISTER CONTROLLER
The ADMV8526 plug-in utilizes an SPI register controller to com-
municate with the ADMV8526. When using the ADMV8526 in a
system, it is recommended to follow a similar methodology for
implementing SPI communication. The following is a summary of
the SPI register controller:
1.
Determine if Register 0x000 is not set to 0x3C.
2.
If Step 1 is true, set Register 0x000 to 0x3C to enable the SDO
pin on the ADMV8526 and to allow SPI streaming with Endian
register ascending order.
3.
Determine if the values have changed for any of the WR
registers (Register 0x020 to Register 0x022).
4.
If Step 3 is true, write to Register 0x020 through Register 0x022
by pointing to Register 0x020 and streaming out 3 bytes of
data. The transaction is 40 bits in total (R/W bit + 15 address
bits + 24 data bits).
5.
If Step 4 has occurred, write dummy data to Address 0x0A.
Note that Address 0x0A does not exist in the ADMV8526, and
the written dummy data is ignored. This step is microcontroller
architecture dependent and can be ignored in most cases. It is
necessary for the SDP-S to clear the SPI bus and reconfigure
for a standard 24-bit SPI transaction.
6.
Determine if the values have changed for any of the LUT
registers (Register 0x100 to Register 0x15F).
7.
If Step 6 is true, write to Register 0x100 to Register 0x15F by
performing the following:
a.
Pointing to Register 0x100 and streaming out 48 bytes of
data.
b.
Pointing to Register 0x130 and streaming out 48 bytes of
data.
8.
If Step 7 has occurred, repeat Step 5.
9.
Write out any remaining registers that may have changed.
