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EVAL-ADM2867EEBZ

 User Guide 

UG-1677

 

Rev. 0 | Page 5 of 12 

To maximize the margin to the EN 55032 Class B specification, 
adhere to the following guidelines: 

 

Ensure that the decoupling capacitors are placed as close to 
the correspondin

ADM2867E

 pins as possible. 

 

Place a 10 μF capacitor (C4) and a 0.1 μF capacitor (C5) 
between the V

CC

 pin and GND

1

 pins of th

ADM2867E

.  

 

Place a 0.1 μF capacitor (C7) between the V

IO

 pin and 

GND

1

 pins of th

ADM2867E

.  

 

Connect Pin 24, Pin 26, and Pin 28 of the 

ADM2867E

 

together to form a single GND

ISO

 net. Connect this net to the 

GND

2

 pins through the E1 ferrite bead. 

 

Place a 0.1 μF capacitor (C9) between the V

ISOOUT

 supply pin 

and the GND

ISO

 net of th

ADM2867E

 

Connect the V

ISOOUT

 pin to the V

ISOIN

 pin of th

ADM2867E

 

through the E2 ferrite bead.  

 

Place a 10 μF capacitor (C12) and a 0.1 μF capacitor (C8) 
between the V

ISOIN

 supply pin (Pin 23) and the GND

2

 pins 

(Pin 22) of the 

ADM2867E

.  

 

Remove any metal planes or floods from the area around 
or under the GND

ISO

 net and V

ISOOUT

 net. 

The EVAL-ADM2867EEBZ designed according to these 
guidelines meets the EN 55032 Class B requirements with 
margin. See Figure 2, Figure 7, and Figure 8 for further details 
on the recommended PCB layout.  

 

Figure 2. Layout Guidelines to Achieve EN 55032 Class B 

EN 55032 RADIATED EMISSIONS TEST RESULTS 

The EVAL-ADM2867EEBZ meets the EN 55032 and CISPR32 
Class B requirements for radiated emissions with margin. The 
testing was performed in worst case conditions under a full 
54 Ω load with both the transceiver and receiver transmitting 
at 25 Mbps. Figure 3 shows the results obtained in a 10 meter, 
semianechoic chamber, which are below the Class B limit.  

 

Figure 3. CISPR32/EN 55032 Radiated Emissions Test 

Table 2. Jumper Configurations 

Link Jumper 

Connection  Description 

LK1 A 

Connects the RE input of the 

ADM2867E

 to the V

IO

 pin. This setting disables the receiver. 

 B 

Connects the RE input of the 

ADM2867E

 to the RE terminal on the P2 connector. 

 C 

Connects the RE input of the 

ADM2867E

 to the GND

1

 pins. This setting enables the receiver. 

LK2 

Connects the DE input of the 

ADM2867E

 to the V

IO

 pin. This setting enables the driver. 

 

Connects the DE input of the 

ADM2867E

 to the DE terminal on the P2 connector. 

 

Connects the DE input of the 

ADM2867E

 to the GND

1

 pins. This setting disables the driver. 

 

Connects the DE input of the 

ADM2867E

 to the RE input signal. Therefore, the input for both RE and DE 

is set by the LK1 jumper. This setting ensures that when the driver is enabled, the receiver is disabled, or 
when the driver is disabled, the receiver is enabled. 

LK3 

AB 

Connects the TxD input of the 

ADM2867E

 and J1 SMA connector to the TxD terminal on the P3 connector. 

 BC 

Connects the TxD input of the 

ADM2867E

 and J1 SMA connector to the 

LTC6900

 oscillator output. 

To configure the oscillator frequency to be between 1 kHz and 12.5 MHz, set the R2 and R3 resistors. 
Only use this option when the V

IO

 supply input is between 3 V to 5.5 V. 

 

Not inserted 

Connects the TxD input of the 

ADM2867E

 to the J1 SMA connector. 

LK4 

Connects the INVD input of the 

ADM2867E

 to the V

IO

 pin. This setting enables the driver inversion feature. 

 

Connects the INVD input of the 

ADM2867E

 to the INVD terminal on the P3 connector. 

 

Connects the INVD input of th

ADM2867E

 to the GND

1

 pins. This setting is used for normal driver operation.  

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

GND

1

GND

1

V

CC

V

IO

GND

1

GND

1

GND

1

10µF

0.1µF

0.1µF

V

SEL

GND

ISO

V

ISOOUT

GND

2

V

ISOIN

GND

ISO

RxD

RE
DE

INVR

GND

1

INVD

TxD

GND

2

A
B

GND

2

GND

2

Y

Z

GND

ISO

METAL KEEP OUT

ADM2867E

TOP VIEW

(Not to Scale)

0.1µF

10µF

E1

E2

0.1µF

220

60-

002

80

70

60

50

40

30

20

10

0

RA

DI

A

TE

D

 FIE

LD

 S

TR

E

N

G

TH

 (

dB

µ

V

/m

)

30

100

FREQUENCY (MHz)

1000

CLASS B

CLASS A

22060-

009

Summary of Contents for EVAL-ADM2867EEBZ

Page 1: ...lated RS 485 transceiver The ADM2867E features an integrated isolated dc to dc converter that provides power to the isolated side of the device with no additional ICs required An on board ADP7104 low dropout LDO regulator accepts an input voltage of 3 3 V to 20 V and regulates the voltage to a selectable 3 3 V or 5 V supply for the VCC pin of the ADM2867E The LDO regulator can be bypassed to power...

Page 2: ...Evaluation Board Hardware 4 Setting Up the Evaluation Board 4 Input and Output Connections 4 Radiated Emissions 4 EN 55032 Radiated Emissions Test Results 5 Other Board Components 6 Full Duplex RS 485 Transceivers Loopback Test 7 IEC 61000 4 2 Electrostatic Discharge ESD Protection 7 Evaluation Board Schematic and Artwork 9 Ordering Information 11 Bill of Materials 11 REVISION HISTORY 5 2020 Revis...

Page 3: ...EVAL ADM2867EEBZ User Guide UG 1677 Rev 0 Page 3 of 12 EVALUATION BOARD PHOTOGRAPH Figure 1 22060 001 ...

Page 4: ...her because this connection shorts the power and ground pins together See Table 2 and Table 3 for more details on the jumper and power supply connections The corresponding labeled test points allow power supply monitoring on the EVAL ADM2867EEBZ with the probe referenced to ground INPUT AND OUTPUT CONNECTIONS Digital input and output signals are connected via the P2 and P3 screw terminal blocks to...

Page 5: ...tion LK1 A Connects the RE input of the ADM2867E to theVIO pin This setting disables the receiver B Connects the RE input of the ADM2867E to the RE terminal on the P2 connector C Connects the RE input of the ADM2867E to the GND1 pins This setting enables the receiver LK2 A Connects the DE input of the ADM2867E to the VIO pin This setting enables the driver B Connects the DE input of the ADM2867E t...

Page 6: ... Resistors for Bus Idle Fail Safe The ADM2867E has a built in receiver fail safe for the bus idle condition but there are footprints on the EVAL ADM2867EEBZ for fitting the R10 and R11 pull up resistors to the VISO supply on Pin A and Pin Y of the ADM2867E as well as the R12 and R13 pull down resistors to the GND2 supply pins on Pin B and Pin Z These resistors can be fitted if the user is connecti...

Page 7: ...The EVAL ADM2867EEBZ is tested to achieve protection against IEC 61000 4 2 ESD to 12 kV contact and 15 kV air on Pin A Pin B Pin Y and Pin Z of the ADM2867E The IEC 61000 4 2 ESD standard describes testing using two coupling methods known as contact discharge and air discharge Contact discharge implies direct contact between the discharge gun and the equipment under test EUT During air discharge t...

Page 8: ...d 5 5 V 3 3 V isolated output High Not used PowerVCC directly on connector P1 with a supply voltage between 4 5V and 5 5V 5 V isolated output B Low 6 V to 20 V Regulator provides 5 V supply to VCC 3 3 V isolated output High Invalid condition 5V isolated output is not supported withVCC 4 5V B High C Low 4 V to 20 V Regulator provides 3 3 V supply to VCC 3 3 V isolated output High 6 V to 20 V Regula...

Page 9: ...1 P3 P2 P1 LK5 LK4 R13 R12 RT2 RT1 P7 P8 E2 E1 LK7 LK6 LK2 LK1 U2 U1 U3 INVR_1 TxD_1 VREG VCC GND1 VREG_IN RE_1 DE_1 VCC TxD_1 VIO VREG VREG_IN VIO A Z GND VIO INVD_1 VIO RxD DE TxD INVD INVR Y VIO VIO VIO B VISO VISO VISO 2 1 1 2 2 2 2 1 1 3 2 1 2 1 3 2 1 3 1 2 3 1 6 4 2 5 3 1 5 3 1 6 4 2 3 2 1 3 2 1 2 2 1 1 2 2 1 1 8 6 4 2 7 5 3 1 6 4 2 5 3 1 1 8 2 7 PAD 4 6 3 5 1 3 5 2 4 18 17 27 25 23 7 4 11 8...

Page 10: ... 1677 EVAL ADM2867EEBZ User Guide Rev 0 Page 10 of 12 Figure 7 EVAL ADM2867EEBZ Component Side Layer 1 Figure 8 EVAL ADM2867EEBZ Layer 2 Figure 9 EVAL ADM2867EEBZ Silkscreen 22060 006 22060 007 22060 008 ...

Page 11: ...n 3 2 0 1 inch headers and shorting block Multicomp 2213S 06G 1 LK2 8 pin 4 2 0 1 inch header and shorting block Multicomp 2213S 08G 1 LK3 3 pin 3 1 0 1 inch header and shorting block Molex 22 28 4033 5 LK6 LK7 LK9 to LK11 2 pin 1 2 0 1 inch headers and shorting block Harwin M20 9990246 5 P1 to P3 P7 P8 Three way terminal blocks Wurth Elektronik 691131710003 3 R1 R3 R7 R8 Resistors 0 Ω 0603 Vishay...

Page 12: ...he EvaluationBoard or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board including but not limited to soldering or any other a...

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