EVAL-ADM1075EBZ User Guide
UG-304
EVALUATION BOARD DESCRIPTION
The evaluation board is designed to demonstrate many different
features of the
ADM1075
. Not all components are required in a
typical design. The functional block diagram in Figure 1 shows
the key components of the evaluation board.
The typical lab setup is shown in Figure 2. The hot-swap line input
voltage is connected across the RTN IN and −48V IN connectors.
A resistive load can be connected across RTN OUT and −48V
OUT. The mini-USB connector is used to supply 5 V power to the
isolated section of the board while the
USB-SDP-CABLEZ
is
connected to the 10-way connector, SK3, for isolated I
2
C
communication.
Isolation is required in most −48 V applications because there is a
large ground potential difference between the −48 V section of the
board and a PC or microcontroller. The
ADuM1250
is used to
demonstrate I
2
C isolation on the board, and the
ADuM3200
is used
to demonstrate isolation of other digital signals. The
ADuM5404
provides quad-channel digital isolation with
iso
Power®. An
integrated dc-to-dc converter provides up to 500 mW of regulated,
isolated power from the isolated side to the −48 V side. When
the isolated section is powered, the
iso
Power is switched in to
power the 5 V components on the primary side of the board.
FAULT TIMER
FET POWER
FOLDBACK
CONTROL
DIGITAL
AND
PMBus
12-BIT ADC
POWER
MULTIPLIER
POWER
ACCUMULATOR
GATE CONTROL
CURRENT LIMIT
DRAIN
RESTART
SHDN
LATCH
GPO1/ALERT1/CONV
GPO2/ALERT2
SDAO
SDAI
SCL
ADR
ADC_AUX
PWRGD
SPLYGD
UNDERVOLTAGE
AND
OVERVOLTAGE
DETECTOR
V
CC
AND
REFERENCE
GENERATOR
VIN
ADC_V
VCAP
UVL
UVH
SENSE+
GATE
PLIM
N-FET
R
SENSE
= 2mΩ
R
DROP
–48V RTN (0V)
–48V
VEE
SENSE–
ISET
TIMER
SS
VEE_G
VEE
OV
VEE
PWRGD_ISO
SPLYGD_ISO
C
LOAD
= 680μF
= 3kΩ
560kΩ
16kΩ
825kΩ
11.3kΩ
470nF
150kΩ
1kΩ
1.8MΩ
1μF
1μF
VEE
SHDN_ISO
RESTART_ISO
SDA_ISO
SCL_ISO
LATCH_ISO
GPO2_ISO
LATCH
GPO2
SPLYGD
ADuM5404
ADuM1250
ADuM3200
10070-
101
Figure 1. Functional Block Diagram
Rev. C | Page 3 of 19
