Analog Devices EVAL-ADG788EBZ, Manual

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EVAL-ADG788EBZ
Rev. 0 | Page 5 of 8
EVALUATION BOARD SCHEMATICS AND ARTWORK
J4-1
J4-3
J4-2
T8
V
SS
V
DD
T9
T10
C3
10µF
C4
10µF
+
+
J23
3
2
1
AB
CASE
CASE
GND
TOP
BOTTOM
PHONO_DUAL
J1
1
4
5
2
3
CASE
CASE
GND
TOP
BOTTOM
PHONO_DUAL
J2
1
4
5
2
3
CASE
CASE
GND
TOP
BOTTOM
PHONO_DUAL
J3
1
4
5
2
3
CASE
CASE
GND
TOP
BOTTOM
PHONO_DUAL
J5
1
4
5
2
3
J9
3
2 V
DD
1
AB
J8
T6
8
9
10
7
6
5
4
3
2
1
IN2
IN3
NC
S2A
D2
S2B
GND
V
SS
V
SS
S1B
D1
S3B
D3
S3A
V
DD
S4B
D4
S4A
IN4
IN1
S1A
13
12
11
14
15
16
17
18
19
20
T7
3
2 V
DD
1
AB
U1
ADG788
T4
T5
T3
C1
0.1µF
T1
T2
T19
T18
T17
T16
T15
T14
V
DD
T13
T12
T11
C2
0.1µF
R4
50 Ω
R3
50 Ω
R1
10k Ω
R2
10k Ω
V
DD
J12
J13
3
2
1 AB
V
DD
3
2
1 AB
R5
10k Ω
R6
10k Ω
R7
50 Ω
R8
50 Ω
CASE
CASE
TOP
GND
BOTTOM
PHONO_DUAL
J11
3
2
3
2
2
2
4
5
1
CASE
CASE
TOP
GND
BOTTOM
PHONO_DUAL
J10
4
5
1
3
CASE
CASE
TOP
GND
BOTTOM
PHONO_DUAL
J7
4
5
1
3
CASE
CASE
TOP
GND
BOTTOM
PHONO_DUAL
J6
4
5
1
0
67
56
-00
2
Figure 2. Evaluation Board Schematic