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UG-690 

EVAL-AD7405FMCZ User Guide 

 

GENERATING A HISTOGRAM

 

OF THE ADC CODE 

DISTRIBUTION

 

The 

Histogram

 tab (see Figure 17) can be used to perform ac 

testing or, more commonly, dc testing. This tab shows the ADC 
code distribution of the input and computes the mean and 
standard deviation, which are displayed as 

DC Offset/Mean

 and 

Transition Noise

, respectively, in the 

Histogram Analysis

 area 

(labeled 2 in Figure 17).  

AC Input 

To perform a histogram test of ac input,  
1.

 

Apply a quality signal source to the VIN+ input on the 
board. 

2.

 

Select the 

Histogram

 tab in the evaluation software main 

window  

3.

 

Click the 

Single Capture 

or 

Continuous Capture

 button 

(labeled 1 in Figure 17).  

DC Input 

The histogram is more commonly used for dc testing.  
To perform a histogram test of dc input,  
1.

 

Select the 

Histogram

 tab in the evaluation software main 

window. 

2.

 

Click 

Single Capture 

or 

Continuous Capture

 (labeled 1 in 

Figure 17). 

Raw data is captured and passed to the PC for statistical 
computations, and various measured values are displayed in the 

Histogram Analysis

 area (labeled 2 in Figure 17). 

 

 

Figure 17. Histogram Capture Tab

 

1

2

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Summary of Contents for EVAL-AD7405FMCZ

Page 1: ...D DESCRIPTION The EVAL AD7405FMCZ is a full featured evaluation board designed to allow the user to easily evaluate all features of the AD7405 isolated analog to digital converter ADC The evaluation board can be controlled by the EVAL SDP CH1Z via the FMCZ connector J9 The SDP H1 board EVAL SDP CH1Z allows the evaluation board to be controlled through a USB port of a PC using the evaluation board ...

Page 2: ...ut Signals 7 Link Configuration Options 9 Setup Conditions 9 Evaluation Board Circuitry 10 Sockets Connectors 10 Test Points 10 Basic Hardware Setup 11 Evaluation Board Software 12 Starting the Software 12 Description of Main Window 14 Generating a Waveform Analysis Report 15 Generating a Histogram of the ADC Code Distribution 16 Generating a Fast Fourier Transform of AC Characteristics 17 Generat...

Page 3: ... evaluation board as shown in Figure 2 4 Connect the EVAL SDP CH1Z board to the PC via the USB cable For Windows XP you may need to search for the EVAL SDP CH1Z drivers Choose to automatically search for the drivers for the EVAL SDP CH1Z board if prompted by the operating system 5 Power up the EVAL SDP CH1Z by inserting the 12 V dc barrel jack included with EVAL SDP CH1Z into the barrel connector ...

Page 4: ...he CD 2 Double click the setup exe file to begin the installation By default the software is saved to the following location C Program Files Analog Devices AD740X 3 A dialog box appears asking for permission to allow the program to make changes to your computer Click Yes to begin the installation process see Figure 3 Figure 3 Evaluation Software Installation User Account Control 4 Select the locat...

Page 5: ...begin the driver installation process see Figure 7 Figure 7 EVAL SDP CH1Z Drivers Installation Setup Wizard 2 Select the location to install the drivers and then click Install see Figure 8 Figure 8 EVAL SDP CH1Z Drivers Installation Choose Install Location 3 Click Install to proceed with the installation see Figure 9 Figure 9 EVAL SDP CH1Z Drivers Installation Windows Security 4 To complete the dr...

Page 6: ...l connector labeled 12V_VIN on the EVAL SDP CH1Z board 4 Connect the EVAL SDP CH1Z board to the PC via the USB cable enclosed in the EVAL SDP CH1Z kit Verifying the Board Connection 1 Allow the Found New Hardware Wizard to run after the EVAL SDP CH1Z board is plugged into your PC If you are using Windows XP you may need to search for the EVAL SDP CH1Z drivers Choose to automatically search for the...

Page 7: ...t of link options This evaluation board is designed to be supplied via the EVAL SDP CH1Z The EVAL SDP CH1Z generates 12 V and 3 3 V supply rails The 12 V supply is connected to the on board 5 V linear regulator that supplies the ADuM6000 with power The ADuM6000 then generates an isolated 5 V supply to power the VDD1 rail of the AD7405 The 3 3 V supply rail from the EVAL SDP CH1Z is used to supply ...

Page 8: ... AD7405FMCZBlock Diagram SDP H1 BOARD XILINX SPARTAN 6 FPGA ADuM6000 12V SUPPLY ADP7104 5 0 AD7405 LOW VOLTAGE VIN VIN VDD1 VDD2 ADP2241 HIGH V GND VDD1 GND B 3 3V SUPPLY VDD2 GND B A C A HIGH VOLTAGE 12304 012 MCLK MDAT MDAT MCLK Rev 0 Page 8 of 20 ...

Page 9: ...power supplied from the EVAL SDP CH1Z board and the analog supply rail VDD1 being supplied via the on board isoPower ADuM6000 dc to dc converter Table 2 Link Options Category Link Default Position Function Power Supplies LK1 A This link selects the AD7405 VDD1 supply source Remove LK5 if using either Position A or Position B Position A VDD1 is supplied from the ADuM6000 on board device Position B ...

Page 10: ...nal source high voltage The default interface to this evaluation board is via the FMC connector which connects the EVAL AD7405FMCZ to the EVAL SDP CH1Z board If the EVAL AD7405FMCZ board is used in standalone mode communication is achieved via the J3 and J4 SMB jacks See Table 2 for more information about configuring the evaluation board for standalone mode TEST POINTS There are several test point...

Page 11: ... operation ensure that the link options are in their default positions as outlined in Table 2 Ensure all links are in the appropriate position before connecting the evaluation board to the EVAL SDP CH1Z Before powering up the EVAL SDP CH1Z connect the EVAL AD7405FMCZ to FMC Connector J4 on the EVAL SDP CH1Z board After the evaluation board and the EVAL SDP CH1Z board have been connected securely a...

Page 12: ... select Programs Analog Devices AD7405 The main window of the software then opens see Figure 14 2 If the EVAL AD7405FMCZ is not connected to the USB port via the EVAL SDP CH1Z when the software is launched a connectivity error displays see Figure 13 Connect the evaluation board to the USB port of the PC wait a few seconds click Rescan and follow the instructions Figure 13 Connectivity Error Alert ...

Page 13: ...EVAL AD7405FMCZ User Guide UG 690 Figure 14 Evaluation Software Main Window 1 2 3 4 6 5 12304 014 Rev 0 Page 13 of 20 ...

Page 14: ...ettings section labeled 6 in Figure 14 specifies the MCLK frequency used for the serial interface and the decimation ratio used by the FPGA to filter the data The Samples drop down box labeled 4 in Figure 14 allows selecting the number of samples to be captured in a single acquisition Clicking Single Capture see label 5 in Figure 14 initiates the sampling and readback of the number of measurements...

Page 15: ...the resulting waveform Graph controls labeled 2 in Figure 16 are located above the graph and may be used pan and zoom into particular areas of the graph see the Graph Tools section and Figure 15 for more information The Waveform Analysis area labeled 3 in Figure 16 shows statistics pertaining to the captured waveform such as maximum minimum and mean amplitudes and signal frequency Figure 16 Wavefo...

Page 16: ... quality signal source to the VIN input on the board 2 Select the Histogram tab in the evaluation software main window 3 Click the Single Capture or Continuous Capture button labeled 1 in Figure 17 DC Input The histogram is more commonly used for dc testing To perform a histogram test of dc input 1 Select the Histogram tab in the evaluation software main window 2 Click Single Capture or Continuous...

Page 17: ...ss filter based on the sinusoidal signal applied 2 Click the FFT tab from the main window 3 Click Single Capture or Continuous Capture As in the histogram test raw data is then captured and passed to the PC which performs the FFT and displays the resulting SNR THD and SINAD Figure 18 displays the spectral analysis results of the captured data The plot is the FFT image of the raw data The FFT Analy...

Page 18: ...ure 19 shows the Summary tab This tab captures and displays all of the information in one window with a synopsis of the information including key performance parameters such as SNR and THD see the SNR and THD boxes labeled 1 and 2 respectively in Figure 19 Figure 19 Summary Tab 1 2 12304 019 Rev 0 Page 18 of 20 ...

Page 19: ...location Screenshots are saved in jpeg format and can be viewed with any picture viewer editor Figure 21 Dialog Box for Saving a Screenshot PRINT SCREENSHOT To print a screenshot from the File menu select Print Screenshot The screenshot is sent to the default printer No dialog will appear when printing a screenshot OPENING FILES Loading Captured Data The software can load previously captured data ...

Page 20: ...valuationBoard or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board including but not limited to soldering or any other activ...

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