Analog Devices EVAL-AD7175-2SDZ, User Manual

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EVAL-AD7175-2SDZ User Guide UG-AD7175-2
SOCKETS AND CONNECTORS
Table 2. Connector Details
Connector Function Connector Type Manufacturer
Manufacturer
Number
Order Code 1
J1 Connector to the EVAL-SDP-CB1Z 120-way connector,
0.6 mm pitch Hirose FX8-120S-SV(21) FEC1324660
J2 External MCLK Input Straight PCB mount
SMB/SMA jack Tyco 1-1337482-0 Not applicable
J3 External bench top voltage supply for
the
EVAL-AD7175-2SDZ
Power socket block,
3-pin, 3.81 mm pitch Phoenix
Contact MC 1,5/ 3-G-3,81 FEC3704737
J5 External ac-to-dc adapter input for the
EVAL-AD7175-2SDZ , 7 V to 9 V
DC power
connectors, 2 mm
SMT power jack
Kycon KLDX-SMT2-
0202-A MOUSER 806-
KLDX-SMT20202A
J6 Analog input terminal block; wired
connection to external source or sensor Power socket block,
8-pin, 3.81 mm pitch Phoenix
Contact MC 1,5/ 8-G-3,81 FEC3704774
J9 External bench top voltage supply
option for AVDD1/AVDD2, IOVDD and
AVSS inputs on the
AD7175-2
Screw terminal block,
3.81 mm pitch Phoenix
Contact MKDS 1/4-3.81 FEC3704592
J10 Optional header 7-way, 2.54 mm pin
header Samtec SSW-107-01-T-S FEC1803478
J13 Optional header 7-way, 2.54 mm
socket Samtec TLW-107-05-G-S FEC1668499
A0 to A4 Analog inputs to ADC Straight PCB mount
SMB/SMA jack Tyco 1-1337482-0 Not applicable
A7 PMOD Compatible Header 6-Pin SIL Header
(0.1" pitch) Harwin 20-9990646 FEC 1022255
1 Order codes starting with FEC are for Farnell.
SERIAL INTERFACE
The AD7175-2 evaluation board connects via the serial
peripheral interface (SPI) to the Blackfin® ADSP-BF527 on the
EVAL-SDP-CB1Z . There are four primary signals: CS, SCLK,
and DIN (all inputs), and one output from the ADC,
DOUT/RDY.
To operate the
EVAL-AD7175-2SDZ in standalone mode,
disconnect the evaluation board from the SDP-B controller
board. Use the test points to connect the signals to an alternative
digital capture setup or the PMOD compatible header (A7).
POWER SUPPLIES
Power the evaluation board from the ac-to-dc adapter
connected to J5, or from an external bench top supply applied
to J3 or J9. Linear LDOs generate the required voltages from the
applied input voltage (V
IN
) rail when using J3 or J5. Use J9 to
bypass the on-board regulators. An ADP7118 regulator is used
to generate the 5 V (single supply) and 2.5 V (split supply)
supplies for the AVDD1 and AVDD2 rails to the ADC; a second
ADP7118 generates 3.3 V for the IOVDD rail. The ADP7104
supplies 5 V for the SDP-B controller board as well as 5 V for
the ADM660 voltage converter to generate -5 V to supply the
ADP7182 . The ADP7182 generates the -2.5 V supply for AVSS
when operating in split supply mode. Each supply is decoupled
where it enters the board and again at each device in accordance
with the schematic. Table 3 shows the various power supply
configurations available, including split supply operation.
Rev. Pr.C | Page 5 of 12