ADXL180
Rev. 0 | Page 41 of 56
ERROR DETECTION
OVERVIEW
The ADXL180 monitors its internal operation and reports
errors. The error reporting codes differ depending on whether
the state vector has been enabled. Table 39 describes the errors
and the specific codes transmitted in various configurations.
The state vector allows the ADXL180 to report specific errors if
enabled. If the state vector is not enabled, a single error code is
sent regardless of the type of error. The error code is transmitted
every 228 μs in asynchronous mode until power down. The
error code is transmitted in response to every synchronization
pulse in synchronous mode until power down.
PARITY ERROR DUE TO COMMUNICATIONS
PROTOCOL CONFIGURATION BIT ERROR
As shown in Table 39, an error code is generated if the parity of
the ADXL180 device OTP memory is incorrect. However, if this
error is due to a parity error in one of the ERC, SVD, DAT, or MAN
bits that govern the format of the transmitted message, the error
code is transmitted in an alternate data format. Receive system
designs that recognize repeated message transmissions, wrong
data lengths, and incorrect Manchester encoding help to detect
more easily that an error code is being set.
Table 39. Status/Error Coding
Error
State Vector Enabled
State Vector Disabled
Error Reporting Active in Phases
8-Bit
Data Mode
10-Bit
Data Mode
8-Bit
Data Mode
10-Bit
Data Mode
Configuration Error
0x7F
127d 0x1F9 505d 0x7D
125d 0x1F4 500d 2
Offset Error
0x7E
126d 0x1F8 504d 0x7D
125d 0x1F4 500d 5
Self-Test Error
0x7D
125d 0x1F7 503d 0x7D
125d 0x1F4 500d 4,
OTP Parity Error
0x7C
124d 0x1F6 502d 0x7D
125d 0x1F4 500d 4,
5
Device OK
0x7B
123d 0x1E7 487d 0x7B
123d 0x1E7 487d 3
Device Not OK (NOK)
0x7A
122d 0x1F4 500d 0x7D
125d
0x1F4
500d
3, 4, 5
1
A self-test error reported during Phase 5 indicates a failure of the internal self-test circuit, not a sensor self-test error.
