UG-707
ADV8005 Hardware Reference Manual
vs_packet_id[7:0]
, HDMI RX Infoframe Map,
Address 0xE3EC[7:0]
This control is used to set the Vendor Specific InfoFrame ID
Function
vs_packet_id[7:0]
Description
0xxxxxxx
Packet type value of packet stored in InfoFrame Map, Address 0x54 to 0x6F
1xxxxxxx
Packet type value of packet stored in InfoFrame Map, Address 0x54 to 0x6F
acp_packet_id[7:0]
, HDMI RX Infoframe Map,
Address 0xE3EF[7:0]
This control is used to set the ACP Packet ID
Function
acp_packet_id[7:0]
Description
0xxxxxxx
Packet type value of packet stored in InfoFrame Map, Address 0x70 to 0x8B
1xxxxxxx
Packet type value of InfoFrame stored in InfoFrame Map, Address 0x70 to 0x8B
isrc1_packet_id[7:0]
, HDMI RX Infoframe Map,
Address 0xE3F2[7:0]
This control is used to set the ISRC1 Packet ID
Function
isrc1_packet_id[7:0]
Description
0xxxxxxx
Packet type value of packet stored in InfoFrame Map, Address 0x8C to 0xA7
1xxxxxxx
Packet type value of InfoFrame stored in InfoFrame Map, Address 0x8C to 0xA7
isrc2_packet_id[7:0]
, HDMI RX Infoframe Map,
Address 0xE3F5[7:0]
This control is used to set the ISRC2 Packet ID
Function
isrc2_packet_id[7:0]
Description
0xxxxxxx
Packet type value of packet stored in InfoFrame Map, Address 0xA8 to 0xC3
1xxxxxxx
Packet type value of InfoFrame stored in InfoFrame Map, Address 0xA8 to 0xC3
gamut_packet_id[7:0]
, HDMI RX Infoframe Map,
Address 0xE3F8[7:0]
This control is used to set the Gamut Metadata Packet ID
Function
gamut_packet_id[7:0]
Description
0xxxxxxx
Packet type value of packet stored in InfoFrame Map, Address 0xC4 to 0xDF
1xxxxxxx
Packet type value of InfoFrame stored in InfoFrame Map, Address 0xC4 to 0xDF
Note
: The packet type values and corresponding packets should not be programmed in the packet type values registers. The general control
packet (0x03) is always processed internally and cannot be stored in the packet/InfoFrame registers in the InfoFrame Map.
5.12.
HDMI SECTION RESET STRATEGY
The following reset strategy is implemented for the HDMI section:
•
Global chip reset – This means the
Serial Video Rx core can be reset using the
. A global chip reset
is triggered by asserting the RESET pin to a low level. The HDMI section is reset when a global reset is triggered.
•
Loss of TMDS clock or 5 V signal reset – A loss of TMDS clock or 5 V signal to the Serial Video Rx resets the entire Serial Video Rx
section. The loss of a 5 V signal condition is discarded if
is set high.
•
DVI mode reset – The packet processing block, including InfoFrame memory, is held in reset when the Serial Video Rx processes a
DVI stream.
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