3.3V
3.3V
3.3V
3.3V
I0A
I0B
I0C
I0D
I1A
I1B
I1C
I1D
S
YA
YB
YC
YD
E
I0A
I0B
I0C
I0D
I1A
I1B
I1C
I1D
S
YA
YB
YC
YD
E
3.3V
JSZ
A0185-2003
ADSP-BF561 EZ-KIT LITE:
10/10/03
1.3A
ANALOG
DEVICES
4
3
2
1
A
B
C
D
A
B
C
D
4
3
2
1
Approvals
Date
Drawn
Checked
Engineering
Date
Size
Title
Board No.
Sheet
of
C
PH: 1-800-ANALOGD
Nashua, NH 03063
20 Cotton Road
Rev
ADG774A
12.288MHz
ADG774A
DSP JTAG HEADER
All USB interface circuitry is considered propreitary andh has
been omitted from this schematic
When designin your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
12-11-2003_13:22
15
18
DEBUG AGENT - JTAG
805
0.00
R87
USB_TCK
USB_TDO
EMULATOR_EMU
USB_EMU
805
R201
10K
805
R239
10K
C209
402
0.1UF
0.1UF
402
C195
2
5
11
14
3
6
10
13
1
4
7
9
12
15
U37
QSOP16
ADG774A
USB_TDI
USB_TRST
USB_TMS
EMULATOR_TCK
EMULATOR_TRST
EMULATOR_TDI
EMULATOR_TDO
2
5
11
14
3
6
10
13
1
4
7
9
12
15
U36
QSOP16
ADG774A
10K
R241
805
1
3
5
7
9
11
13
2
4
6
8
10
12
14
P4
IDC7X2
7X2
C196
402
0.1UF