Shift Register Interface
1-18
ADSP-21479 EZ-Board Evaluation System Manual
low power state. The RTC provides several programmable interrupt
options, including interrupt per second, minute, hour, or day clock ticks,
interrupt on programmable stopwatch countdown, or interrupt at a pro-
grammed alarm time. An
RTCLKOUT
signal that operates at 1 Hz is also
provided for calibration.
The 32.768 kHz input clock frequency is divided down to a 1 Hz signal
by a prescaler. The counter function of the timer consists of four counters:
a 60-second counter, a 60-minute counter, a 24-hour counter, and an
32,768-day counter. When the alarm interrupt is enabled, the alarm func-
tion generates an interrupt when the output of the timer matches the
programmed value in the alarm control register. There are two alarms:
The first alarm is for a time of day. The second alarm is for a day and time
of that day.
The stopwatch function counts down from a programmed value, with
one-second resolution. When the stopwatch interrupt is enabled and the
counter underflows, an interrupt is generated.
Example programs are included in the EZ-Board installation directory to
demonstrate RTC functionality.
Shift Register Interface
The shift register (SR) of the ADSP-21479 processor can be used as a
serial to parallel data converter. The shift register module consists of an
18-stage serial shift register, 18-bit latch, and three-state output buffers.
The shift register and latch have separate clocks. Data is shifted into the
serial shift register on the positive-going transitions of the shift register
serial clock (
SR_SCLK
) input. The data in each flip-flop is transferred to the
respective latch on a positive-going transition of the shift register latch
clock (
SR_LAT
) input.
