Analog Devices ADRF5519-EVALZ, User Manual

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User Guide UG-1948
EVALUATION BOARD HARDWARE
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OVERVIEW
The ADRF5519-EVALZ is preinstalled with connectors (end launch
SMA) and assembled with the ADRF5519 and its application
circuitry. All components are placed on the primary side of
the ADRF5519-EVALZ. An assembly drawing for the ADRF5519-
EVALZ is shown in Figure 8 . An ADRF5519-EVALZ schematic is
provided in Figure 9 .
ADRF5519-EVALZ LAYOUT
The ADRF5519-EVALZ is designed using RF circuit design techni-
ques on an 8-layer printed circuit board (PCB). The PCB stack-up is
shown in Figure 2 .
Figure 2. Evaluation Board Stack-Up
The outer copper layers are 2 oz (2.7 mil) thick and the inner layers
are 1 oz (1.3 mil) thick. The top dielectric material is 10 mil Rogers
4350B, which provides 50 Ω controlled impedance and optimizes
high frequency performance. The remaining six dielectric layers are
FR4 based filler layers that improve the mechanical strength of the
ADRF5519-EVALZ and meet the overall board thickness of 62 mil.
All RF traces are routed on the top layer and the remaining
seven layers are ground planes that provide a solid ground for
RF transmission lines and help to manage thermal rise on the
ADRF5519-EVALZ during high power operations.
The RF transmission lines are designed using a coplanar wave-
guide (CPWG) model with a width of 18 mil and ground spacing
of 13 mil to have a characteristic impedance of 50 Ω. Ground via
fences are arranged on both sides of a coplanar waveguide to
improve isolation between nearby RF lines and other signal lines.
The exposed ground pad of the ADRF5519, which is soldered
on the PCB ground pad, is the main thermal conduit for heat
dissipation. The PCB ground pad is densely populated with filled
through vias to provide the lowest possible thermal resistance path
from the top to the bottom of the PCB. The connections from the
package ground leads to ground are kept as short as possible.
POWER SUPPLY INPUTS
The ADRF5519-EVALZ has five power supply inputs and two
grounds, as shown in Table 1 . The dc test points are populated only
on the SWVDDB, VDD1_A, and VDD1_B test points, whereas the
VDD2_A and VDD2_B points are shorted to VDD1_A and VDD1_B,
respectively, via 0 Ω resistors. A single 5 V supply is connected
to the dc test points on the SWVDDB, VDD1_A, and VDD1_B test
points. Ground reference can be connected to the GND or GND1
test point. The typical total current consumption for the ADRF5519
is 220 mA in receive operation, high gain mode.
Each supply pin for the LNAs of the ADRF5519-EVALZ is decou-
pled with 1 nF and 10 µF capacitors. A 10 µF capacitor is used on
the supply line for the switches of the ADRF5519-EVALZ.
Table 1. Test Points for Power Supply Inputs
Test Points
Description
VDD1_A Supply LNA Stage 1 on Channel A
VDD2_A Supply LNA Stage 2 on Channel A, Do Not Insert (DNI)
VDD1_B Supply LNA Stage 1 on Channel B
VDD2_B Supply LNA Stage 2 on Channel B, DNI
SWVDDB Supply switches on Channel A and Channel B
GND Ground
GND1 Ground
The ADRF5519-EVALZ also has edge mounted Subminiature Ver-
sion A (SMA) connectors for power supply inputs, as shown in
Table 2 . These SMA connectors are not populated by default and
can be connected by the user.
Table 2. SMA Connectors for Power Supply Inputs
SMA Connectors
Description
VDD_A Supply LNA on Channel A
VDD_B Supply LNA on Channel B
SWVDDB Supply switches on Channel A and Channel B