UG-1962
Rev. 0 | Page 8 of 14
26242-
004
J3
VG1
J2
SENSE
R5
0Ω
J1
VDD
C11
3300µF
+
C10
100µF
+
C3
180pF
100V
C2
0.1µF
100V
C4
10µF
100V
C7
10µF
50V
C8
10µF
50V
C9
10µF
50V
U1
MIC5021YN
8
2
3
NC
4
5
6
7
1
VBOOST
GATE
SENSE–
SENSE+
GND
CT
INPUT
VDD
J4
PULSE
C5
10µF
50V
VDD_DRVR
C6
0.1µF
50V
D
S
G
Q1
IRFZ48NSTRLPBF
R1
0Ω
SENSE
GND
J5
PULSED_VDD
C1
4700pF
4
1
3
GND
D1
MBRB2535CTLT4G
R3
1kΩ
P2
P2
VG1
VREF_BIAS
VREF
PULSED_VDD
19
17
15
13
11
9
7
3
1
2
5
23
16
10
12
14
4
6
8
24
22
20
18
21
GND
GND
VREF
VREFBIAS
5015
P1
GND
GND
P1
VDET
VDET
VG1
VDET_BIAS
PULSED_VDD
19
17
15
13
11
9
7
3
1
2
5
23
16
10
12
14
4
6
8
24
22
20
18
21
VDETBIAS
Figure 4. Analog Devices, Inc., Pulser Board Schematic