Analog Devices ADP-8860 Manual Download Page 9

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EVAL-ADP8860

Rev. 0 | Page 9 of 24

VIEW/MODIFY OPTIONS AND INTERRUPTS

Figure 17. View/Modify Options and Interrupts

The view/modify options and interrupts block displays the
ADP8860 general options and interrupts section (following
a

Read Registers

operation) and allows modification of their

current values (see Figure 17). The user just needs to select the
desired value and then write to the device by clicking the

Write

Registers

button (see Figure 25). If the option

Smart Update

is checked (default condition) as soon as a register value is
changed, the application sends a programming command
for that specific register without the need to press the

Write

Registers

button. If

Smart Update

is unchecked, then data is

programmed in the device registers when the

Write Registers

button is depressed.

The

Backlight/Sink Enable (BLEN)

control selects the current

sinks used for the backlight (if the respective control is unchecked)
or those treated as individual sinks (if the respective control is
checked). This control corresponds to Register BLSEN
(Address 0x05).

Interrupts are enabled (if checked) or disabled (if unchecked)
by the

Interrupts Enable

options. This control corresponds to

Interrupts Pending

section. This indicator

corresponds to Register MDCR2 (Address 0x02).

Interrupts

Pending

can be cleared by depressing the

Clear Interrupts

button (see Figure 25).

MFG ID

is the manufacturer ID, Register MFDVID, Bit[7:4]

(Address 0x00).

DEV ID

is the ADP8860 device revision,

The

D6 Config

checkbox selects D6 pin function. If unchecked,

D6 is the sixth current sink. If checked, D6 is the input for the
second phototransistor. This corresponds to Bit CMP2_SEL in
the CFGR register (Bit 5, Address 0x04). When D6 is selected
as input for the second phototransistor, Jumper J16 must be
removed.

The

BL Fade Override

checkbox enables fade override mode. If

unchecked, fade override is disabled. If checked, fade override is
enabled. This corresponds to Bit FOVR in the CFGR register
(Bit 0, Address 0x04).

The

INT_CFG

checkbox selects the interrupt reassertion

mode. If unchecked, the interrupt is reasserted immediately,
after clearing a pending interrupt, when the condition persists.
If checked, the interrupt is deasserted at least 50 μs after
clearing the pending interrupt. This corresponds to Bit
INT_CFG in the MDCR register (Bit 6, Address 0x01).

VIEW/MODIFY BACKLIGHT PARAMETERS

Figure 18. View/Modify Backlight Parameters

The controls in the view/modify backlight parameters block
show the current parameters programmed for the backlight
and allow modifications using the selections and drop-down
controls.

The backlight brightness level is shown/changed for three
levels: daylight, office, and dark. Each level has two operating
states: maximum and dim. The first row shows/changes the
maximum backlight brightness level, whereas the second row is
for the dim level. The first column from the left shows/changes
the

DAYLIGHT

levels, the second column shows/changes the

OFFICE

levels, and the third column shows/changes the

DARK

levels. The controls correspond to the following ADP8860
registers:

•

Maximum daylight = Register BLMX1 (Address 0x09)

•

Dim daylight = Register BLDM1 (Address 0x0A)

•

Maximum office = Register BLMX2 (Address 0x0B)