User Guide
UG-1461
Rev. B | Page 11 of 19
SETTING V
CTRL
VOLTAGE FOR THE
The ADMV1013-EVALZ evaluation board comes with the
nano
DAC. The
nano
DAC sets the V
CTRL
voltage
for the VCTRL1 and VCTRL2 pins of the
. When
plugin opens, enter the V
CTRL
voltage in the
VCTRL1 and VCTRL2 Voltage (mV)
box in the
INITIAL
CONFIGURATION
section to set the voltage (see Figure 12).
Note that 1800 mV is the highest gain setting for the devices.
When using an external power supply for the V
CTRL
voltage, use
nano
DAC
plugin to change the voltage or power
down the
nano
DAC. To open the
nano
DAC
plugin, double click the
AD5601
button in the
ADMV1013-
044718 RevA
tab (see Figure 12). Figure 16 shows the
nano
DAC user interface. The user interface contains the
Power
Down Modes
box, the
VCTRL1 and VCTRL2 Voltage (mV)
box, and the
Equivalent Decimal Value
box.
To power up or power down the
nano
DAC, enter a value
in the
Power-Down Modes
box, or use the scroll arrows to
adjust the value. To use the
nano
DAC, set the
Power-
Down Modes
box to 0. When the V
CTRL
voltage is being applied
externally through the test loop, set the
Power Down Modes
box to 1, 2, or 3. For more information on the different power-
down modes of the
nano
DAC, see the
data sheet.
17
268-
0
16
nanoDAC User Interface
To set the V
CTRL
voltage, enter a value in the
VCTRL1 and
VCTRL2 Voltage (mV)
box, or type the corresponding decimal
number for an 8-bit register in the
Equivalent Decimal Value
box. The V
CTRL
voltage range available is 0 mV to 3300 mV. Set
the
VCTRL1 and VCTRL2 Voltage (mV)
value to 0 mV for the
lowest gain of the
, and to set it to 1800 mV for the
highest gain of the
. There is no change in the gain
for V
CTRL
values above 1800 mV.
After making any changes to the voltage or to the power-down
mode, click
Apply Changes
(see Figure 16). To allow the changes
to take place automatically, select
Auto Apply
in the
ADMV1013-
044718 RevA
tab. There is no need to click
Apply Changes
after selecting
Auto Apply
.
UPDATING REGISTER 0X0A SEQUENCE
When Register 0x0A needs to be updated, the update must
follow a specific sequence. The
software automatically
follows this sequence when Register 0x0A is in need of an update.
The sequence that the
software carries out is as follows:
1.
Disable PARITY_EN bit (Bit 15, Register 0x00).
2.
Write to Register 0x0A.
3.
Enable PARITY_EN bit (Bit 15, Register 0x00).