Analog Devices ADL6316-EVALZ, User Manual

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ADL6316-EVALZ User Guide UG-1663
Rev. 0 | Page 5 of 8
CONFIGURATION AND PROGRAMMING
SEQUENCE
To configure and program the evaluation board, take the
following steps:
1. Run the ACE software as explained in the Error!
Reference source not found. section.
2. Click Initialize Chip ( Label A , see Figure 6).
3. Click and adjust the block ( Label B to Label H in Figure 6)
if necessary.
4. After changing the block in the ACE software as directed
in Step 3, click
Apply Changes
(
Label K
, see Figure 7) to
update the ADL6316 .
5. To adjust an individual register and bit, click Proceed to
Memory Map . This button opens the ADL6316 memory
map for bit control (see Figure 8). The ADL6316 can be
configured by either putting data into
Data(Hex)
column
( Label L, see Figure 8 ) or by clicking a specific bit in the
Data(Binary) column( Label M, see Figure 8 ) of the register
map (see Figure 8). Click Apply Changes ( Label N, see
Figure 8 ) to save changes and program the ADL6316 .
A
I
J
H
B
G
C
D
E
C1
J1
J2
E1
E2
D1
D2
D3
F1
F2
F
C2
C4
C3
21832-
008
Figure 6. ADL6316 Chip Block Diagram
Table 2. Main Screen Functionality (see Figure 6)
Label Function
A
Initialize chip button.
B 3.3 V low dropout regulator (LDO) enable.
C VVA control block.
C1 VVA Enable checkbox.
C2 Selects VVA voltage source:
DAC = VVA attenuation set by internal 12-bit DAC, set DAC code (0 to ~4095 range) in
VVA Atten (Dec Code) field.
VVA_ANALOG = VVA attenuation set by analog voltage applied on ANLG pin.
C3 DAC Enable checkbox for VVA attenuation when the VVA Source field is set to DAC .
C4 VVA Atten (Dec Code) menu. Selects VVA DAC code in decimal (0 to ~4095 range). Higher numbers equal less attenuation.
D DSA control block, DSA Atten 0 and DSA Atten 1 are selected by the logic level on TXEN (see Table 1).
D1 DSA Enable checkbox.
D2 Set DSA Atten 0 attenuation.
D3 Set DSA Atten 1 attenuation.
E AMP1 Enable checkbox. AMP1 can be set individually by the logic level on TXEN (see Table 1).
F AMP2 Enable checkbox. AMP2 can be set individually by the logic level on TXEN (see Table 1).
G Read Temp Sensor button and ADC Code text fields. These functions are for proportional to absolute temperature (PTAT) ADC code
readback.
H ADC Enable checkbox.
I IBIAS Enable checkbox. This function enables the bias generator.
J IP3 Optimization control block.
J1 Enable
checkbox for IP3 optimization.
J2 TRM AMP2 IP3M dropdown menu. Set TRM_AMP2_IP3 bits value for IP3 optimization.