Evaluation Board User Guide
UG-600
either using the microphone itself or by using the dummy
300 Ω or 500 Ω resistor connected across the positive and
negative input terminals of the evaluation board.
16.
The faults are reported in the channel status indicators for
each channel for which
Diag Control
is
Enabled
(see
17.
The GUI shown in Figure 5 provides access to all the
diagnostics registers.
18.
The
DIAG TRIP POINT ADJUST1
section provides
control for adjusting the trip thresholds (see Figure 5).
19.
The
DIAG_ADJUST2
section provides the fault timeout
adjustment controls (see Figure 5).
20.
The
DIAG IRQ1
section is used to generate the IRQ using
the FAULT pin. The
Fault Pin
Drive
section is used to
report the fault in the system (see Figure 5).
21.
Use the previous controls, as well as the
diagnostics registers in this data sheet, to suit the needs of
the system using the intended microphone.
STANDALONE GUI SPI CONTROL
The
can also be configured for SPI control
instead of for I
2
C control. To use in SPI control mode, take the
following steps:
1.
Change Slide Switches S3, S4, and S5 to SPI mode.
2.
Ensure JP6 is not installed.
3.
In the GUI, go to
Options/Comm Protocol
and select SPI
mode. (The default is I
2
C mode).
4.
The evaluation board is now configured for the SPI
protocol, and the GUI functions similarly to the GUI
functions in I
2
C mode.
STANDALONE MODE
The evaluation board (
) also has a
standalone mode that does not require any I
2
C or SPI control.
In standalone mode, the
are set internally for a specific operation; no register access is
provided because the I
2
C and SPI ports are disabled. To invoke
the standalone mode (SA mode), insert Jumper JP6 and set
Slide Switches S3, S4, and S5 to the standalone position. In SA
mode, limited options are available that can be set using the
dual inline package (DIP) Switch S8. See Table 2 for the S8
switch settings.
Table 2. Settings in SA Mode
Pin No.,
Mnemonic
Switch S8
Function
OFF
ON
Pin 17, SDA/COUT
S8-6
MCLK 256 fs to 384 fs select
IOVDD
384 fs
GND
256 fs
Pin 18, SCL/CCLK
S8-5
Full-scale (FS) 48 k/96 k select
IOVDD
96 k
GND
48 k
Pin 19, ADDR0/CLATCH
S8-4
I
2
S/TDM select
IOVDD
TDM
GND
I
2
S
Pin 20, ADDR1/CIN
S8-3
Master/slave select
IOVDD
Slave
GND
Master
Pin 14, SDATAOUT2
S8-2
TDM 4 to TDM 8 select
IOVDD
TDM 8
GND
TDM 4
Pin 8, FAULT
S8-1
TDM 8 slot assignments, Slot 1 to Slot 4 or
Slot 5 to Slot 8
IOVDD
Slot 5 to Slot 8
GND
Slot 1 to Slot 4
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