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Evaluation Board for 

2.7 GHz DDS-Based 

Agile

RF

 Synthesizer

 

AD9956/PCB

 

 

Rev.

 

 

 

Information furnished by Analog Devices is believed to be accurate and reliable. 
However, no responsibility is assumed by Analog Devices for its use, nor for any 
infringements of patents or other rights of third parties that may result from its use. 
Specifications subject to change without notice. No license is granted by implication 
or otherwise under any patent or patent rights of Analog Devices. Trademarks and 
registered trademarks are the property of their respective owners.

 

 

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. 
Tel: 781.329.4700

 

www.analog.com 

Fax: 781.326.8703

© 2005 Analog Devices, Inc. All rights reserved. 

EVALUATION BOARD FUNCTIONAL BLOCK DIAGRAM 

÷

M

DDS

÷

R

VCO

÷

N

LPF

AD9956

LPF

VCO AND LOOP FILTER ONLY POPULATED ON

AD9956-VCO/PCB. THESE SOCKETS LEFT VACANT

FOR USER TO POPULATE ON AD9956/PCB

J16

J6

J7

J1

REFCLK

RF

DIVIDER

SYSCLK

DAC IOUT

DAC IOUT

DRV_OUT

DRV_OUT

SYSCLK

REFCLK

PLL_OSC

CML DRIVER

PHASE FREQUENCY DETECTOR/

CHARGE PUMP

PLL_REF

PLL_OSC

CP_OUT

J2

J3

50

J4

J5

05278-001

 

Figure 1.

 

DESCRIPTION 

This data sheet describes the AD9956/PCB evaluation board 
hardware and software. The current version of software 
provides a graphical user interface (GUI) that allows easy 
communication with the many on-chip functions of the device.  

The AD9956 is a highly sophisticated 

Agile

RF synthesizer with 

numerous user-programmable functions. See the AD9956 data 
sheet for detailed information about the part. 

 

 

Summary of Contents for AD9953YSVZ

Page 1: ...781 326 8703 2005 Analog Devices Inc All rights reserved EVALUATION BOARD FUNCTIONAL BLOCK DIAGRAM M DDS R VCO N LPF AD9956 LPF VCO AND LOOP FILTER ONLY POPULATED ON AD9956 VCO PCB THESE SOCKETS LEFT...

Page 2: ...nning and Using the Software 4 Control Dialog Box 5 Profile Dialog Box 6 Clock Driver Control Phase Frequency Detector Charge Pump Dialog Box 7 DUT Signals Dialog Box 8 DUT I O Dialog Box 8 Debug Wind...

Page 3: ...ind of application the external signal should be applied to the DUT REF IN connector J2 This leads to the AD9956 Pins PLLREF PLLREF the reference input of the AD9956 s phase frequency detector See the...

Page 4: ...Program Files ADI AD9956 Evaluation Software 2 Double click the icon to launch the evaluation software A status window similar to Figure 2 appears in the center of the AD9956 Evaluation Software dial...

Page 5: ...raw undivided REFCLK is used as the internal system clock when this box is checked Do not select this box if the REFCLK input is greater than 400 MHz Output Waveform In the Output Waveform box select...

Page 6: ...output The PLL lock detect enable bit in the Charge Pump dialog box enables a PLL lock monitoring function either through the PLL_LOCK_DETECT pin externally or by setting a flag in the control regist...

Page 7: ...ntire charge pump A delay occurs when coming out of this power down to reestablish the correct charge pump current Select Charge Pump Quick Powerdown to power down the phase detector logic while keepi...

Page 8: ...end an I O update to the device s every time you click LOAD default on If you want a device to wait for a manually sent I O update signal clear the corresponding check box DUT I O DIALOG BOX This dial...

Page 9: ...The Debug Window shown in Figure 9 lets you directly write to any of the internal registers and subsequently read them back You can also directly toggle the states of any external inputs such as PS0...

Page 10: ...harge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although this product features proprietary ES...

Page 11: ...AD9956 PCB Rev 0 Page 11 of 12 NOTES...

Page 12: ...AD9956 PCB Rev 0 Page 12 of 12 NOTES 2005 Analog Devices Inc All rights reserved Trademarks and registered trademarks are the property of their respective owners EB05278 0 1 05 0...

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