background image

UG-001 

Evaluation Board User Guide

 

Rev. 0 | Page 10 of 24 

Adjusting the Amplitude of the Input Signal 

Next, adjust the amplitude of the input signal for each channel 
as follows: 

1.

 

Adjust the amplitude of the input signal so that the 
fundamental is at the desired level. (Examine the 

Fund 

Power

 reading in the left panel of the 

VisualAnalog FFT

 

window.) If the gain pin voltage is too low, it is not possible 
to reach full scale without distortion. Use a higher gain 
setting or a lower input level to avoid distortion. This also 
depends on the PGA gain setting, which can be 30 dB, 
27 dB, 24 dB, or 21dB. See Figure 15 and Figure 16. 

07

78

2-

02

6

 

Figure 15. VisualAnalog, Graph Window 

0

77

82

-02

7

 

Figure 16. VisualAnalog, Formatted FFT Plot 

2.

 

Repeat this procedure for the other seven channels.  

3.

 

Click the disk icon within the 

Graph

 window to save the 

performance plot. See Figure 17 for an example. 

0

–130

0

2

0

778

2-

1

19

FREQUENCY (MHz)

AM

P

L

IT

UD

E

 (

d

BF

S

)

5

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–110

–120

5

10

15

20

f

IN

 = 3.5MHz @ –1dBFS

LNA = 6×
V

GAIN

 = 1V

FILTER TUNED
HPF = 700kHz

 

Figure 17. Typical FFT, AD9272/AD9273 

USING THE INTEGRATED CROSSPOINT SWITCH 
(CW DOPPLER MODE) 

To examine the spectrum of the CW Doppler integrated 
crosspoint switch output, use the following procedure: 

1.

 

Complete the steps in the Configuring the Board and 
Using the Software for Testing sections to ensure that the 
board is set up correctly. 

2.

 

Optionally, remove the voltage source from the gain pin. It 
does not affect the CW Doppler output. 

3.

 

Connect the dc voltage source to P601, connecting the  
−5 V pin, the 0 V ground pin, and the +5 V pin as shown 
in Figure 1. These benchtop linear supplies should each have 
100 mA of current capability.  

4.

 

Place jumpers on the top pin pairs of P606 or P607 to 
connect CWD2+/CWD2− to CWD5+/CWD5− to the 
IOP/ION buses. This directs each of these connections to 
the output amplifier for display. 

Note that the CWD0±/CWD1±/CWD6±/CWD7± outputs 
are configured and biased to interface with the 

AD8339

 

evaluation board. The AD9272/AD9273 is specially designed 
to snap onto the AD8339 evaluation board to allow the user to 
evaluate a larger portion of this common signal chain. For 
detailed instructions about enabling this function, send an 
email to 

[email protected]

5.

 

Use a 1 m, shielded, RG-58, 50 Ω coaxial cable to connect 
the spectrum analyzer to J402 (labeled AOUT

 

on the 

evaluation board). 

6.

 

In the 

ADCBase 0

 tab of the SPI Controller, find the 

MODES(8)

 box. Select the 

CW Mode

 option (see Figure 18). 

Summary of Contents for AD9272

Page 1: ...c voltage source 5V w 100 mA each DOCUMENTS NEEDED AD9272 and AD9273 data sheets HSC ADC EVALCZ data sheet High Speed Converter Evaluation Platform FPGA based data capture kit AN 905 Application Note...

Page 2: ...rdware 3 Power Supplies 3 Input Signals 3 Output Signals 3 Default Operation and Jumper Selection Settings 5 Evaluation Board Software Quick Start Procedures 7 Configuring the Board 7 Using the Softwa...

Page 3: ...urrent capability for AVDD_DUT and DRVDD_DUT however it is recommended that separate supplies be used for both analog and digital domains An additional supply is also required to supply 3 0 V to the d...

Page 4: ...AC 47Hz TO 63Hz 07782 070 ANALOG INPUT SIGNAL SYNTHESIZER SIGNAL SYNTHESIZER OPTIONAL CLOCK SOURCE SPECTRUM ANALYZER CW OUTPUT AGILENT POWER SUPPLY GAIN CONTROL INPUT PC RUNNING ADC ANALYZER OR VISUAL...

Page 5: ...peration Consult the AD9515 data sheet for more information about these and other options PDWN To enable the power down feature short P303 to the on position AVDD on the PDWN pin STBY To enable the st...

Page 6: ...tween the AD9272 AD9273 CWDx outputs and the AD8339 inputs DOUTx DOUTx If an alternative data capture method to the setup described in Figure 2 is used optional receiver terminations R701 to R710 can...

Page 7: ...ed RG 58 50 coaxial cable to connect the signal generator For best results use a narrow band band pass filter with 50 terminations and an appropriate center frequency Analog Devices uses TTE Allen Avi...

Page 8: ...he drawback is that each FFT display is only 8k points Exit the ADC Data Capture Settings box by clicking OK Setting Up the SPI Controller After the ADC data capture board setup is completed set up th...

Page 9: ...re 11 SPI Controller HIGHPASS 2B Box 5 In the ADC A tab of SPI Controller find the OFFSET 10 box Use the drop down box labeled Offset Adj to perform an offset correction to the LNA if the LNA power se...

Page 10: ...examine the spectrum of the CW Doppler integrated crosspoint switch output use the following procedure 1 Complete the steps in the Configuring the Board and Using the Software for Testing sections to...

Page 11: ...60 70 80 90 100 0 2 07782 004 FREQUENCY MHz AMPLITUDE dBm 5 10 15 20 5 FREQUENCY 2 3MHz CWD1 DIFFERENTIAL OUTPUT Figure 20 Typical Spectrum Analyzer Display of CWD Output Figure 18 SPI Controller MODE...

Page 12: ...UG 001 Evaluation Board User Guide Rev 0 Page 12 of 24 EVALUATION BOARD SCHEMATICS AND ARTWORK 07782 005 Figure 21 Evaluation Board Schematic DUT Analog Input Circuits...

Page 13: ...Evaluation Board User Guide UG 001 Rev 0 Page 13 of 24 07782 006 Figure 22 Evaluation Board Schematic DUT Analog Input Circuits Continued...

Page 14: ...UG 001 Evaluation Board User Guide Rev 0 Page 14 of 24 07782 007 Figure 23 Evaluation Board Schematic DUT VREF and Decoupling...

Page 15: ...Evaluation Board User Guide UG 001 Rev 0 Page 15 of 24 07782 008 Figure 24 Evaluation Board Schematic Clock SPI and Gain Circuits...

Page 16: ...UG 001 Evaluation Board User Guide Rev 0 Page 16 of 24 07782 009 Figure 25 Evaluation Board Schematic Power Supply CW Doppler Digital Output Interface...

Page 17: ...Evaluation Board User Guide UG 001 Rev 0 Page 17 of 24 07782 010 Figure 26 Evaluation Board Layout Top Side...

Page 18: ...UG 001 Evaluation Board User Guide Rev 0 Page 18 of 24 07782 011 Figure 27 Evaluation Board Layout Ground Plane Layer 2...

Page 19: ...Evaluation Board User Guide UG 001 Rev 0 Page 19 of 24 07782 012 Figure 28 Evaluation Board Layout Power Plane Layer 3...

Page 20: ...UG 001 Evaluation Board User Guide Rev 0 Page 20 of 24 07782 013 Figure 29 Evaluation Board Layout Power Plane Layer 4...

Page 21: ...Evaluation Board User Guide UG 001 Rev 0 Page 21 of 24 07782 014 Figure 30 Evaluation Board Layout Ground Plane Layer 5...

Page 22: ...UG 001 Evaluation Board User Guide Rev 0 Page 22 of 24 07782 015 Figure 31 Evaluation Board Layout Bottom Side...

Page 23: ...end launch coaxial Samtec SMA J P H ST EM1 14 2 P302 P303 Header 2 pin single row male 100 mil straight Samtec TSW 102 07 G S 15 3 J601 P606 P607 Conn PCB header 8 pin double row Samtec TSW 104 07 G...

Page 24: ...r high accuracy 1 8 V SOT 223 Analog Devices ADP3339AKCZ 1 8 R7 51 1 U705 IC regulator high accuracy 3 3 V SOT 223 Analog Devices ADP3339AKCZ 3 3 R7 52 1 U706 IC regulator high accuracy 3 0 V SOT 223...

Reviews: