Quick Start Guide
AD9102-EBZ
©
2010
Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00000-0-1/0
Figure 12: AD9102-EBZ Evaluation Board
Using the AD9514
By default the AD9514 is configured to provide a 180Mhz clock input to the AD9102 from a 1.44 Ghz sine wave
input to J10 of the EVB. The AD9514 has a configurable divider that can be set through external resistors on the
EVB. The AD9102 evaluation board allows the AD9514 divider to be set by changing resistors. Output 0 from the
AD9514 is used as a PECL output to drive the AD9102 CLKP/CLKN inputs. Output 2 is used to drive the external
clock on J9.
Table 2 summarizes a few common settings used to divide the input clock by 2, 4, 8 and 16.
S9
S10
÷2
1/3
0
R142
open
R136
open
R141
open
R147
0
Ω
R143
open
R144
open
÷4
1
0
open open
0
Ω
0
Ω
open open
÷8
2/3
1/3
open 0
Ω
open open open open
÷16
1
2/3
open open
0
Ω
open 0
Ω
open
Table 2: AD9514 settings
