AN231K04-DVLP3 – AnadigmApex Development Board
UM023100-K001
Page 5 of 16
6.0 Other
Features
V
REF
Pins
The 3 reference pins on the FPAA device – VMR (+1.5V), VREFP (+2.5V) and VREFN (+0.5V) – have been
connected via the p.c.b. tracks to the 3 holes to the right of the FPAA. In addition, VMR is available on 2 rows of
pins that are adjacent to the analog I/Os. These reference voltages are not designed to provide current.
Header Pins
All of the analog I/Os of the FPAA are brought out to header pins for easy connection. Next to these header
pins is a second row of header pins connected to VMR (+1.5V). This allows the user to connect any FPAA
analog I/O to VMR using shorting jumpers, resistor jumpers or capacitor jumpers.
EPROM
There is an SPI EEPROM socket in the digital section of the board. To put the board into EPROM mode:
1. Put a jumper onto J8 which sits right next to the EPROM socket, and
2. Put a jumper on J4 in the position marked SI so that this pin is connected to a pull-down.
3. Make sure that there are jumpers on J5 in the positions marked GND, VDD, CFG, ACLK, SI, MCLK and
MSUP (it is OK to put jumpers in all positions of J5).
Press the “reset” button to download the circuit from the EPROM into the FPAA.
Reset Button
There is a reset button near the upper right corner of the board. This resets both the FPAA and the PIC (unless
the PORB jumper is removed from J5 or the J1 jumper is in the left position).
In EPROM mode, press the reset button to load the circuit from the EPROM into the FPAA.
SPI Port
There is an SPI port for direct control of the FPAA by an external SPI controller. Note that all the jumpers
should be removed from J5 when the SPI port is used. (see the AN231E04 FPAA specification and use guide
for details of this SPI connection)
Digital Section
The digital section of the evaluation board is provided only so that there is a convenient (serial) interface from
the board to a PC to enable direct configuration (instant prototyping) of the FPAA from AnadigmDesigner
®
2
software, normal use of the FPAA does not require this digital interface, the FPAA can be programmed directly
from an SPI interface. It is convenient when first developing an analog circuit within the FPAA to have the
direct interface to AnadigmDesigner
®
2, when the circuit(s) are implemented into a final design either a host uP
(or DSP) or an EEPROM is normally used to store and configure the FPAA.
The digital section of the board includes an RS-232 transceiver and a PIC microcontroller (to perform serial
ASCII to bit conversion). It also includes a green LED (to indicate successful configuration), and a red LED (to
indicate failed configuration
The digital section sits along the top side of the board and is connected to the rest of the board by a set of
jumpers J5. It is possible to cut away the digital section to leave a purely analog board with header pins on the
edge to provide an external digital interface.
If the digital section of the development board is removed or ignored (by pulling jumpers J5), the FPAA can be
configured directly using any processor with an SPI interface (or port configured with appropriate signals) by
connecting signals directly to the FPAA side of J5 or by connecting to the set of pins marked “SPI”. Full
dynamic control of the FPAA’s analog circuitry can be realised under software control via this connection.
Note
Anadigm
®
does not recommend any specific processor/controllers – our products work with most processors.
Anadigm
®
recommends that our customers use their own processor development boards and connect via
jumper J5 to Anadigm’s FPAA for fully dynamic control of the FPAA, in preference to re-engineering the digital
section of this development board.
Summary of Contents for AnadigmApex AN231K04-DVLP3
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