Ampak AP6356SD Series User Manual Download Page 11 | Manualshive

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AMPAK Technology Inc.

www.ampak.com.tw

Proprietary & Confidential Information

Doc. NO:

5

3. Bluetooth function verification step

UART

：

Figure4. Bluetooth verification connection interface to Host UART

Hardware Setup:



Refer to Figure4 UART pin definition connects the J1 interface of AP6356SDXX

evaluation board to Host UART control interface.



Connects an external antenna at I-PEX connector on the evaluation board.



Note to the VDDIO voltage level should be the same as GPIO voltage level of

Host CPU.

USB

：

Figure5. Bluetooth verification connection interface to Host USB

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Summary of Contents for AP6356SD Series

Page 1: ...Inc www ampak com tw Proprietary Confidential Information i Doc NO AMPAK AP6356SDXX Evaluation Kits User manual Version 1 0 Revision History Date Revision Content Revised By Version 2015 12 28 Initial released Aron 1 0 ...

Page 2: ...ause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one of the following measures Reorient or relocate the...

Page 3: ...not be met for example certain laptop configurations or co location with another transmitter then the FCC authorization is no longer considered valid and the FCC ID can not be used on the final product In these circumstances the OEM integrator will be responsible for re evaluating the end product including the transmitter and obtaining a separate FCC authorization End Product Labeling The product ...

Page 4: ...e user body or set the device to lower output power if such function is available Déclaration d exposition aux radiations Le produit est conforme aux limites d exposition pour les appareils portables RF pour les Etats Unis et le Canada établies pour un environnement non contrôlé Le produit est sûr pour un fonctionnement tel que décrit dans ce manuel La réduction aux expositions RF peut être augmen...

Page 5: ...e ou de certaines co localisation avec un autre émetteur l autorisation du Canada n est plus considéré comme valide et l ID IC ne peut pas être utilisé sur le produit final Dans ces circonstances l intégrateur OEM sera chargé de réévaluer le produit final y compris l émetteur et l obtention d une autorisation distincte au Canada End Product Labeling The product can be kept as far as possible from ...

Page 6: ...n permitted for devices in the band 5725 5850 MHz shall be such that the equipment still complies with the e i r p limits specified for point to point and non point to point operation as appropriate and iv the worst case tilt angle s necessary to remain compliant with the e i r p elevation mask requirement set forth in Section 6 2 2 3 shall be clearly indicated v Users should also be advised that ...

Page 7: ... cas iv les pires angles d inclinaison nécessaires pour rester conforme à l exigence de la p i r e applicable au masque d élévation et énoncée à la section 6 2 2 3 doivent être clairement indiqués v De plus les utilisateurs devraient aussi être avisés que les utilisateurs de radars de haute puissance sont désignés utilisateurs principaux c à d qu ils ont la priorité pour les bandes 5250 5350 MHz e...

Page 8: ... 商號或使用者均不得擅自變更頻率加大功率或變更原設計之特性及功能第十四條低功率射頻電機之使用不得影響飛航安全及干擾合法通信經發現有干擾現象時應立即停用並改善至無干擾時方得繼續使用前項合法通信指依電信法規定作業之無線電通信低功率射頻電機須忍受合法通信或工業科學及醫療用電波輻射性電機設備之干擾 1 本模組於取得認證後將依規定於模組本體標示審驗合格標籤 2 系統廠商應於平台上標示本產品內含射頻模組 XXXyyyLPDzzzz x 字樣 ...

Page 9: ...p view of AP6356SDXX EVB Interface highlights 1 U1 AP6356SDXX SIP module 2 J1 UART interface connects with UART transport board for BT 3 J80 PCIE interface connects with PCIE transport board for WIFI 4 J3 Enable H or disable L Bluetooth and WiFi function 5 J4 PCIE interface strapping option 6 J5 5V DC adaptor input connector 7 J6 3V3 RF VBAT WL_VIO BT_VIO for main system I O power path 8 J7 J9 5V ...

Page 10: ...dip connector and this should be used 3 3V for PCIe voltage Figure3 WiFi verification connection interface to Host PCIE Hardware Setup Refer to Figure3 PCIE pin definition connects the J80 interface of AP6356SDXX evaluation board to Host PCIE control interface Connects an external antenna at I PEX connector on the evaluation board Note to the VDDIO voltage level should be the same with GPIO voltag...

Page 11: ...e to Host UART Hardware Setup Refer to Figure4 UART pin definition connects the J1 interface of AP6356SDXX evaluation board to Host UART control interface Connects an external antenna at I PEX connector on the evaluation board Note to the VDDIO voltage level should be the same as GPIO voltage level of Host CPU USB Figure5 Bluetooth verification connection interface to Host USB ...

Page 12: ...etup Refer to Figure5 USB pin definition connects the J9 interface of AP6356SDXX evaluation board to Host USB control interface Connects an external antenna at I PEX connector on the evaluation board WiFi and Bluetooth software setup Please follow up software guideline of Ampak official released ...

Page 13: ...mpak com tw Proprietary Confidential Information Doc NO 正基科技股份有限公司 SPECIFICATION SPEC NO REV 1 6 DATE 09 07 2015 PRODUCT NAME AP6356SDXX Customer APPROVED Company Representative Signature PREPARED REVIEW APPROVED DCC ISSUE PM QA ...

Page 14: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO AMPAK AP6356SDXX 2x2 WiFi Bluetooth4 1 Module Spec Sheet ...

Page 15: ...Preliminary Brian 1 0 2014 10 26 Pin definition modified Brian 1 1 2014 12 11 Pin definition modified Brian 1 2 2015 03 18 Layout and Bluetooth Spec modified Pin map and physical dimension modified Dora 1 3 2015 05 12 Add Part Number Description Dora 1 4 2015 06 29 Add Packet type and total pins Dora 1 5 2015 09 07 Modify label quantity and MSL Dora 1 6 ...

Page 16: ...1 Bluetooth Specification 16 7 Pin Assignments 17 7 1 Pin Map 17 7 2 Pin Definition 17 8 Dimensions 21 8 1 Physical Dimensions 21 8 2 Layout Recommendation 22 8 3 Part Number Description 23 9 External clock reference 24 9 1 SDIO Pin Description 24 10 Host Interface Timing Diagram 25 10 1 Power up Sequence Timing Diagram 25 10 2 SDIO Default Mode Timing Diagram 27 10 3 SDIO High Speed Mode Timing D...

Page 17: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 3 12 3 MSL Level Storage Condition 36 ...

Page 18: ...ing capabilities and advanced security also could interact with different vendors 802 11a b g n ac 2x2 Access Points in the wireless LAN The wireless module complies with IEEE 802 11 a b g n ac 2x2 MIMO standard and it can achieve up to a speed of 867Mbps with dual stream in 802 11n to connect the wireless LAN The integrated module provides SDIO PCIe interface for WiFi UART USB PCM interface for B...

Page 19: ...co located wireless technologies such as LTE GPS or WiMAX Supports standard SDIO PCIe interfaces BT host digital interface HCI UART up to 4 Mbps PCM for audio data Complies with Bluetooth Core Specification Version 4 1 with provisions for supporting future specifications With Bluetooth Class1 or Class2 transmitter operation Supports extended synchronous connections eSCO for enhanced voice quality ...

Page 20: ... the product Module with packaging Evaluation Kits Software utility for integration performance test Product Datasheet Agency certified pre tested report with the adapter board 3 2 Regulatory certifications The product delivery is a pre tested module without the module level certification For module approval the platform s antennas are required for the certification ...

Page 21: ...g The module requires two power supplies VBAT and VDDIO Min Typ Max Unit Operating Temperature 10 25 65 deg C VBAT 3 0 3 6 4 8 V VDDIO 1 7 3 6 V Model Name AP6356SDXX Product Description Support WiFi Bluetooth functionalities Dimension L x W x H 16 x 12 x 1 6 typical mm WiFi Interface Support PCIe BT Interface UART USB PCM Package M 2 1216 Solder down Total Pin 108 Pins Operating temperature 10 C ...

Page 22: ...ive Sensitivity 11b 20MHz 8 PER 1Mbps PER 93 dBm typical 2Mbps PER 91 dBm typical 5 5Mbps PER 88 dBm typical 11Mbps PER 86 dBm typical SISO Receive Sensitivity 11g 20MHz 10 PER 6Mbps PER 90 dBm typical 9Mbps PER 89 dBm typical 12Mbps PER 88 dBm typical 18Mbps PER 85 dBm typical 24Mbps PER 82 dBm typical 36Mbps PER 79 dBm typical 48Mbps PER 74 dBm typical 54Mbps PER 72 dBm typical MIMO Receive Sens...

Page 23: ...al SISO Receive Sensitivity 11n 40MHz 10 PER MCS 0 PER 87 dBm typical MCS 1 PER 83 dBm typical MCS 2 PER 82 dBm typical MCS 3 PER 79 dBm typical MCS 4 PER 75 dBm typical MCS 5 PER 71 dBm typical MCS 6 PER 69 dBm typical MCS 7 PER 68 dBm typical MIMO Receive Sensitivity 11n 40MHz 10 PER MCS 0 PER 89 dBm typical MCS 1 PER 87 dBm typical MCS 2 PER 85 dBm typical MCS 3 PER 82 dBm typical MCS 4 PER 78 ...

Page 24: ...R 89 dBm typical MCS 8 NSS2 PER 65 dBm typical SISO Receive Sensitivity 11ac 40MHz 10 PER MCS 0 NSS1 PER 86 dBm typical MCS 1 NSS1 PER 84 dBm typical MCS 2 NSS1 PER 82 dBm typical MCS 3 NSS1 PER 79 dBm typical MCS 4 NSS1 PER 75 dBm typical MCS 5 NSS1 PER 71 dBm typical MCS 6 NSS1 PER 69 dBm typical MCS 7 NSS1 PER 68 dBm typical MCS 8 NSS1 PER 63 dBm typical MCS 9 NSS1 PER 62 dBm typical MIMO Recei...

Page 25: ...K BPSK 802 11ac OFDM 256 QAM Output Power 802 11a 54Mbps 13 dBm 1 5 dB EVM 25dB 802 11n MCS7 12 dBm 1 5 dB EVM 28dB 802 11ac MCS9 10 dBm 1 5 dB EVM 32dB SISO Receive Sensitivity 11a 20MHz 10 PER 6Mbps PER 90 dBm typical 9Mbps PER 88 dBm typical 12Mbps PER 87 dBm typical 18Mbps PER 84 dBm typical 24Mbps PER 81 dBm typical 36Mbps PER 78 dBm typical 48Mbps PER 73 dBm typical 54Mbps PER 71 dBm typical...

Page 26: ...ical MCS 15 PER 69 dBm typical SISO Receive Sensitivity 11n 40MHz 10 PER MCS 0 PER 86 dBm typical MCS 1 PER 83 dBm typical MCS 2 PER 81 dBm typical MCS 3 PER 78 dBm typical MCS 4 PER 74 dBm typical MCS 5 PER 70 dBm typical MCS 6 PER 68 dBm typical MCS 7 PER 67 dBm typical MIMO Receive Sensitivity 11n 40MHz 10 PER MCS 0 PER 88 dBm typical MCS 1 PER 86 dBm typical MCS 2 PER 84 dBm typical MCS 3 PER ...

Page 27: ...R 68 dBm typical MCS 0 NSS2 PER 88 dBm typical MCS 8 NSS2 PER 64 dBm typical SISO Receive Sensitivity 11ac 40MHz 10 PER MCS 0 NSS1 PER 85 dBm typical MCS 1 NSS1 PER 82 dBm typical MCS 2 NSS1 PER 80 dBm typical MCS 3 NSS1 PER 77 dBm typical MCS 4 NSS1 PER 74 dBm typical MCS 5 NSS1 PER 69 dBm typical MCS 6 NSS1 PER 68 dBm typical MCS 7 NSS1 PER 67 dBm typical MCS 8 NSS1 PER 62 dBm typical MCS 9 NSS1...

Page 28: ...ypical MCS 7 NSS1 PER 63 dBm typical MCS 9 NSS1 PER 59 dBm typical MCS 9 NSS1 PER 57 dBm typical MIMO Receive Sensitivity 11ac 80MHz 10 PER MCS 0 NSS1 PER 83 dBm typical MCS 1 NSS1 PER 82 dBm typical MCS 2 NSS1 PER 80 dBm typical MCS 3 NSS1 PER 76 dBm typical MCS 4 NSS1 PER 73 dBm typical MCS 5 NSS1 PER 70 dBm typical MCS 6 NSS1 PER 68 dBm typical MCS 7 NSS1 PER 66 dBm typical MCS 8 NSS1 PER 62 dB...

Page 29: ... Operating Channel Numbers Channel center frequencies MHz 5 15GHz 5 25GHz 36 5180 40 5200 44 5220 48 5240 5 25GHz 5 35GHz 52 5260 56 5280 60 5300 64 5320 5 5GHz 5 7GHz 100 5500 104 5520 108 5540 112 5560 116 5580 120 5600 124 5620 128 5640 132 5660 136 5680 140 5700 5 725GHz 5 825GHz 149 5745 153 5765 157 5785 161 5805 ...

Page 30: ...2 and 3 Mbps Antenna Reference Small antennas with 0 2 dBi peak gain Frequency Band 2402 MHz 2480 MHz Number of Channels 79 channels Modulation FHSS GFSK DPSK DQPSK RF Specification Min Typical Max Output Power Class 1 5 7 dBm Output Power Class 2 2 dBm Sensitivity BER 0 1 for GFSK 1Mbps 80 dBm Sensitivity BER 0 01 for π 4 DQPSK 2Mbps 80 dBm Sensitivity BER 0 01 for 8DPSK 3Mbps 78 dBm Maximum Inpu...

Page 31: ...tary Confidential Information Doc NO 17 7 Pin Assignments 7 1 Pin Map TOP VIEW 7 2 Pin Definition NO Name Type Description 1 NC No connect 2 NC No connect 3 JTAG_TDI_GPIO4 I 1 SPROM is present 0 SPROM is absent default Applicable in PCIe HOST mode ...

Page 32: ...nections 18 NC No connect 19 NC No connect 20 GND Ground connections 21 NC No connect 22 NC No connect 23 GND Ground connections 24 BT_DEV_WAKE I O Bluetooth DEV_WAKE 25 NC No connect 26 GND Ground connections 27 SLP_CLK I External sleep clock input 32 768KHz 28 WL_RFDISABLE_L_GPIO1 I O WL_DEV_WAKE 29 PCIE_WAKEn O PCIe wake signal 30 PCIE_CLKREQn I O PCIe clock request 31 PCIE_PERSTn I PCIe host i...

Page 33: ..._DATA0 I O SDIO data line bit0 51 SDIO_CMD I O SDIO command response 52 SDIO_CLK I SDIO clock input 53 BT_HOST_WAKE O Bluetooth HOST_WAKE 54 UART_CTS I UART_CTS 55 UART_SOUT O UART_SOUT 56 UART_SIN I UART_SIN 57 UART_RTS O UART_RTS 58 PCM_SYNC I O PCM sync 59 PCM_IN I PCM data in 60 PCM_OUT O PCM data out 61 PCM_CLK I O PCM bus clock 62 GND Ground connections 63 BT_ENABLE I Used by PMU to power up...

Page 34: ...tions 85 GND Ground connections 86 GND Ground connections 87 GND Ground connections 88 GND Ground connections 89 GND Ground connections 90 GND Ground connections 91 GND Ground connections 92 GND Ground connections 93 GND Ground connections 94 GND Ground connections 95 GND Ground connections 96 GND Ground connections G1 GND Ground connections G2 GND Ground connections G3 GND Ground connections G4 G...

Page 35: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 21 8 Dimensions 8 1 Physical Dimensions Unit mm TOP VIEW TOP VIEW ...

Page 36: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 22 8 2 Layout Recommendation Unit mm TOP VIEW ...

Page 37: ...n addition to the 3 3V default speed 25MHz and high speed 50 MHz It has the ability to stop the SDIO clock and map the interrupt signal into a GPIO pin This out of band interrupt signal notifies the host when the WLAN device wants to turn on the SDIO interface The ability to force the control of the gated clocks from within the WLAN chip is also provided Function 0 Standard SDIO function Max Block...

Page 38: ...ious operating states The timing value indicated are minimum required values longer delays are also acceptable WL_REG_ON Used by the PMU to power up or power down the internal regulators used by the WLAN section When this pin is high the regulators are enabled and the WLAN section is out of reset When this pin is low the WLAN section is in reset BT_REG_ON Used by the PMU to power up or power down ...

Page 39: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 26 WLAN OFF Bluetooth OFF WLAN ON Bluetooth OFF WLAN OFF Bluetooth ON ...

Page 40: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 27 10 2 SDIO Default Mode Timing Diagram ...

Page 41: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 28 10 3 SDIO High Speed Mode Timing Diagram ...

Page 42: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 29 10 4 SDIO Bus Timing Specifications in SDR Modes Clock timing SDR Modes Card Input timing SDR Modes ...

Page 43: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 30 Card output timing SDR Modes up to 100MHz Card output timing SDR Modes 100MHz to 208MHz ...

Page 44: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 31 10 5 SDIO Bus Timing Specifications in DDR50 Mode Data Timing ...

Page 45: ...ology Inc www ampak com tw Proprietary Confidential Information Doc NO 32 11 Recommended Reflow Profile Referred to IPC JEDEC standard Peak Temperature 250 C Number of Times 2 times 2 5 sec 2 5 C sec 40 70 sec 250 ...

Page 46: ...www ampak com tw Proprietary Confidential Information Doc NO 33 12 Package Information 12 1Label Label A Anti static and humidity notice Label B MSL caution Storage Condition Label C Inner box label Label D Carton box label ...

Page 47: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 34 12 2 Dimension ...

Page 48: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 35 A B C Humidity indicator Desiccant C D ...

Page 49: ...AMPAK Technology Inc www ampak com tw Proprietary Confidential Information Doc NO 36 12 3 MSL Level Storage Condition NOTE Accumulated baking time should not exceed 96hrs ...

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