Ametek Sorensen Asterion DC ASM, Programming Manual, Page: 78 / 162

M330517-01 Rev C
10-61
10.2.2
Standard Event Status Register (ESR)
Read the Standard Event Status Register (ESR) by issuing the *ESR? command. See
for the Standard Event Status Register bit details. Reading this register or issuing a *CLS
command will clear the ESR. Use the *ESE (Standard Event Status Enable Register) to
enable corresponding ESR bits to be summarized in the summary bit of the SCPI Status
byte. To configure the Power Supply to generate service requests based on the ESR,
both the Standard Event Status Enable Register and the Service Request Enable
Register must be programmed. See Figure 10-2.
Bit Hex Value Description
0 0x01 Operation Complete
1 0x02 Request Control - not used
2 0x04 Query Error
3 0x08 Device Dependent Error
4 0x10 Execution Error (e.g., range error)
5 0x20 Command Error (e.g., syntax error)
6 0x40 User Request - not used
7 0x80 Power On
Table 10-2: Standard Event Status Register
Figure 10-2: Standard Event Status and Standard Event Status Enable Register
The SESER (Standard Event Status Enable Register). This
register is read using the *ESE? SCPI query command. This
register is written to using the *ESE <value> command. A “1” in
the appropriate bit location enables that corresponding bit from
the SESR to pass through to the input of the OR gate to be
included in the SESR summary bit (bit 5) in the SCPI Status Byte.
The SESR (Standard Event Status Register). Masking does not
prevent events from setting bits in the SESR. This facilitates polling
as a means of detecting these events, since the SESR can be polled
(read) using the *ESR? command, irrespective of the bits set or not
set in the Standard Event Status Enable Register.
Eight bit-wise logical
AND operations
SCPI Status Byte
(Bit 5)