3.12 Global Swap Lock on Multiple GPUs
Global swap lock is used to synchronize the timing and surface flip for multiple display
pipes on multiple GPUs.
If this feature is not required, the following signals can be used as 3.3-V GPIOs or left
unconnected on the PCB.
Table 3–13 Global Swap Lock on Multiple GPUs
Pin Name
Type
PD/
PU
Description
GENLK_CLK
I/O
3.3 V
(VDDAN_33)
PD
Reference-clock input for the display PLLs (including the DCPLL
and pixel PLLs) received from the framelock/genlock interface.
Note: Can be unconnected if not used.
GENLK_VSYNC
I/O
3.3 V
(VDDAN_33)
PD
Frame-timing indicator.
Output to the framelock/genlock interface.
SWAPLOCKA
Open drain
3.3 V
-
(Optional) Used in a multiple GPU design with multiple display
outputs to allow all displays in group A to update at the same time
and have synchronous left/right stereo timing.
In a multiple GPU design where displays are connected to more
than one GPU, connect SWAPLOCKA from all GPUs together with
an external 10-kΩ pull-up resistor.
GPU genlock is needed, either via a genlock system or by feeding
all GPUs with the same reference clock.
Connecting SWAPLOCKB is preferred but not required.
SWAPLOCKB
Open drain
3.3 V
-
(Optional) Used in a multiple GPU design with multiple display
outputs to allow all displays in group B to update at the same time
and have synchronous left/right stereo timing.
In a multiple GPU design where displays are connected to more
than one GPU, connect SWAPLOCKB from all GPUs together with
an external 10-kΩ pull-up resistor.
GPU genlock is needed, either via a genlock system or by feeding
all GPUs with the same reference clock.
30
Signal Descriptions
"Vega 10" Databook
56006_1.00
©
2017
Advanced Micro Devices, Inc.
AMD Confidential - Do not duplicate.
