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44409
Rev.
1.70
October 10
AMD SP5100 Databook
Electrical Characteristics
73
11.4 Reset Signal Requirements
Table 11-7: Reset Signal Requirements
Pin Name
Assertion requirements
Comments
SYS_RST#
Must be asserted for 10 ms minimum.
At deassertion, the SYS_RST#
signal will not be sampled by the
internal logic for a period of 32 ms
as it first goes through the internal
debouncing circuit.
RSMRST#
Must be asserted for 10 ms minimum.
At deassertion, the RSMRST# signal
will not be sampled by the internal
logic for a period of 32 ms as it first
goes through the internal
debouncing circuit.
KBRST#
Must be asserted for 30 ns minimum.
The KBRST# should be de-asserted
before A_RST# and LDT_RST# are de-
asserted.
—
11.5 RTC Battery Current Consumption
The RTC battery current consumption is estimated as follows:
Table 11-8: RTC Battery Current Consumption
Power State
RTC Battery Current
Typical
Maximum
G3 (Off)
< 0.5 µA
< 4 µA
S0-S5
< 0.2 µA
-
RTC battery life is calculated using the rated capacity of the battery and typical current numbers. The
typical batteries used for RTC are normally rated for 170 mAh and the worst case current consumption for
the SP5100 is 4.0 µA. Thus, the life of battery will be calculated as follows:
170,000 µAh / 4 µA = 42,500 h = 4.8 years