7.0 TESTING PROCEDURE - CPU-2000 LOGIC MODULE
7 .1 OPERATIONAL TESTS - Connect the Logic Module to a test Output Module known to be operational.
Reference Installation Instructions form CPU-2000 II for correct wiring and Operating Instructions
form CPU-2000 01 for operation of the Logic Module. Install a test EEPROM with the same number
of teeth as the test stand and the same or less than the number of outputs on the test Output Module,
or program a blank EEPROM. NOTE: Do not program over the original EEPROM. (A memory code
P4A180.HC or a P8A180.HC is recommended for testing). Apply 24 Vdc input power to the unit and
run at 360 RPM. Perform the following tests at room temperature.
A
Assure each output fires in sequence, with no multiple firings and in the correct timing on the
spark wheel:
P4A180.HC firing pattern (in degrees):
0 -45 -90 -135 - 180 -225 - 270 - 315 - 0 - 45 - 90 -135 - 180 - 225 - 270 -315
P8A 180.HC firing pattern On degrees):
0 -22.5 -45 - 67.5 - 90 -112.5 - 135 -157.5 - 180 - 202.5-225 - 247.5 -270 -292.5 - 315-337.5-
0 -22.5 - 45 - 67.5 -90-112.5-135-157.5-180-202.5-225-247.5-270-292.5-315-337.5
B.
The display on the CPU-2000 Logic Module should read "FIRING".
The panel 1/0 switches should be as follows:
Fire Confirm Out - closed; Shutdown Out - closed; Alarm Out - closed.
C.
Place Logic Module in Multi-Strike mode and assure outputs are multiple firing (ref. form
CPU-2000 01 section 9.2 ). Turn Multi-Strike OFF before continuing the test.
D.
Change the energy level from E1 to E3 and verify the output voltage changes from
-290±10 volts to -350±10 volts (reference form CPU-2000 01, section 9.3).
E.
Ground the Panel 1/0 Shutdown Input. Ignition firings should immediately cease and the display
should read "SHUTDOWN". The panel 1/0 switches should be as follows:
Fire Confirm Out - open; Shutdown Out - closed; Alarm Out - closed.
7.2 TIMING TESTS. - The following tests should be performed on the Logic Module to verify proper
control of timing (reference form CPU-2000 01, sections 5.0-8.3).
A Enter the TIMING menu and test the GLOBAL RETARD. Vary the global timing and verify the
timing changes on the spark wheel and on the display (reference form CPU-2000 01, section
5.0).
B.
Enter the TIMING menu and test the ONE-STEP RETARD. Ground the miscellaneous input in
the Logic Module and assure the timing retards by the one-step retard value (reference CPU-
2000 01, section 6.5).
C.
Vary the 4 to 20 mA loop and assure the timing retards 24 degrees at 20 mA (or other value
corresponding to the memory program used).
8.0 TESTING PROCEDURE - CPU- 2000 DIAGNOSTIC MODULE
8.1 OPERATIONAL TESTS - Connect the Diagnostic Module to the test Logic and Output Modules as
shown in the Test Stand Wiring diagram. Reference Installation Instructions form CPU-2000 II for
correct wiring and Operating Instructions form CPU-2000 01 for operation of the Diagnostic Module.
Operate the ignition and ENABLE the Diagnostic Module via setup screen. NOTE: The display board
EPROM 601707 and logic board MICROPROCESSOR 601747 must be ver2.0 or higher for
Diagnostic Module operation. Set the DIAG COUNT FREQ to LO via setup screen. Set the power
level to E3S.
A Verify RXD and TXD LED's are flashing and RES LED is on solid in the Diagnostic Module.
B.
Short the secondaries of A 1, A2 (32-output) or A, B (16-output) coils on the spark rack. NOTE:
the coils should be 291001 Altronic coils and wired one per output. The INST values should be
85 +/- 15 counts for each of the two coils.
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