Enpirion
®
Power Evaluation Board User Guide
EP53A8xQI PowerSoC
Dynamically Adjustable Output
The EP53A8xQI is designed to allow for dynamic switching between the
predefined voltage levels by toggling the VID pins. The inter-voltage slew rate is
optimized to prevent excess undershoot or overshoot as the output voltage levels
transition. The slew rate is defined in the datasheet.
This feature can be tested by connecting the VSx jumper center pins to logic
driver to toggle between the various V
OUT
states.
Evaluation Board Schematic
R3
100
0402
C10
10u
FB1
742792012
TP2
1
2
TP1
1
2
Schematic 03400
PCB 03401
J1
ASP12192002
1
2
3
5
6
7
9
1
0
1
1
1
3
1
4
1
5
1
7
1
8
1
9
Vin
Vout
Vin
U1
EP53A8xQI
NC(SW)1
1
PGND
2
PGND
3
Vf b
4
Vsense
5
AGND
6
VOU
T
7
VOU
T
8
VS2
9
VS1
10
VS0
11
Enable
12
AVIN
13
PVIN
14
N
C
(SW
)1
5
1
5
N
C
(SW
)1
6
1
6
TP6
1
TP5
1
TP7
1
TP8
1
ENABLE
VS0
VS1
VS2
R1
N/U
R2
N/U
N/U
D1
S2A
+
C8
47u
U2
N/U
Vin
Input Protection
C4
N/U
TP3
TP4
Place TP3 and TP4
around 100 mil apart
C1 N/U
C2 4.7u
08
0
5
0
80
5
0603
0603
0805
1206
X5R
C10
10u
X5R
X5R
0805
C9
N/U
08
0
5
Figure 4: EP53A8QI Evaluation Board Schematic
NOTE:
Input/Output
capacitors
must be X5R or X7R dielectric
formulations. Do not use Y5V or
any similar dielectric.
Page 6 of 7
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