Alpha Data ADM-VPX3-9Z5-RTM User Manual Download Page 7

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ADM-VPX3-9Z5-RTM User Manual
V1.0 - 8th June 2021

2 Installation

2.1 Software Installation

Please refer to the ADM-VPX3-9Z5 area on the Alpha-Data support site for access to system monitoring utilities,

documentation and FPGA reference designs.

2.2 Hardware Installation

2.2.1 Handling Instructions

The components on this board can be damaged by electrostatic discharge (ESD). To prevent damage, observe

ESD precautions:

- Always wear a wrist-strap when handling the card
- Hold the board by the edges
- Avoid touching any components
- Store in ESD safe bag.

Page 3

Installation
ad-ug-1392_v1_0.pdf

Summary of Contents for ADM-VPX3-9Z5-RTM

Page 1: ...ADM VPX3 9Z5 RTM User Manual Document Revision 1 0 8th June 2021...

Page 2: ...or form without prior written consent from Alpha Data Parallel Systems Ltd Head Office Address Suite L4A 160 Dundee Street Edinburgh EH11 1DQ UK Telephone 44 131 558 2600 Fax 44 131 558 2700 email sa...

Page 3: ...terface 7 3 5 1 On board Interface 7 3 5 2 JTAG Voltages 7 3 6 SATA Connectors 8 3 7 FireFly Connectors 8 3 8 CAN BUS Header 8 3 9 RS232 Dtype 9 3 10 GPIO Headers 9 List of Tables Table 1 References 2...

Page 4: ...ADM VPX3 9Z5 RTM User Manual V1 0 8th June 2021 Page Intentionally left blank...

Page 5: ...gabit Ethernet RJ45 port available on the front panel 1 SATA interface via an internal standard connector 1 DisplayPort interface 2 lanes wide available via the front panel 1 Serial COM port interface...

Page 6: ...8th June 2021 1 2 References Specifications ANSI VITA 46 0 VPX Baseline Standard October 2007 VITA ISBN 1 885731 44 2 ad_ug_1341 ADM VPX3 9Z5 User Manual June 2021 Alpha Data Table 1 References Page 2...

Page 7: ...utilities documentation and FPGA reference designs 2 2 Hardware Installation 2 2 1 Handling Instructions The components on this board can be damaged by electrostatic discharge ESD To prevent damage ob...

Page 8: ...ADM VPX3 9Z5 RTM User Manual V1 0 8th June 2021 3 Functional Description 3 1 Block Diagram Figure 2 ADM VPX3 9Z5 RTM Block Diagram Page 4 Functional Description ad ug 1392_v1_0 pdf...

Page 9: ...R91 R90 C158 C157 C112 C122 C121 C120 C50 C52 C68 C115 C114 D2 R52 R55 C42 L5 R43 U7 R46 C104 C110 C109 C108 C107 R93 R92 C160 C159 R73 R72 R74 R75 C116 U4 FM2 C137 U12 C133 C132 C130 C136 F1 U2 C161...

Page 10: ...position 1 2 GPIO Headers Disabled 2 3 Enabled J12 CANBUS Header J10 DisplayPort Connector BT1 RTC Battery Holder J1 J3 GPIO Headers J11 Xilinx Programming cable Connector J4 PS side SATA interface J1...

Page 11: ...w PSMIO Logic High D5 Green 3 3V Supply Status Normal operation Power Off Table 3 LED Definitions 3 5 JTAG Interface 3 5 1 On board Interface The JTAG boundary scan chain can be accessed via a standar...

Page 12: ...SATA0 J16 DP2_C2M MGT Quad 226 AL6 AL5 DP2_M2C MGT Quad 226 AM4 AM3 PL_SATA1 J17 DP3_C2M MGT Quad 226 AK8 AK7 DP3_M2C MGT Quad 226 AL2 AL1 PL_SATA2 J18 DP2_C2M MGT Quad 226 AJ6 AJ5 DP2_M2C MGT Quad 22...

Page 13: ...GPIO Headers Pin Signal Name FPGA Pin 1 P1_GP_1V8_P_10 AU11 2 P1_GP_1V8_P_9 AW11 3 P1_GP_1V8_N_10 AV11 4 P1_GP_1V8_N_9 AW10 5 GP4_1V8_P AJ15 6 GP3_1V8_P AM13 7 GP4_1V8_N AK15 8 GP3_1V8_N AN13 9 GP2_1...

Page 14: ...1 6 GP7_1V8_P AM10 7 GP8_1V8_N AN11 8 GP7_1V8_N AN10 9 GP6_1V8_P AL15 10 GP5_1V8_P AL14 11 GP6_1V8_N AM15 12 GP5_1V8_N AM14 Table 9 Header J2 Pin Signal Name FPGA Pin 1 GP_SE_3V3_5 D2 2 GP_SE_3V3_2 C3...

Page 15: ...Address Suite L4A 160 Dundee Street Edinburgh EH11 1DQ UK Telephone 44 131 558 2600 Fax 44 131 558 2700 email sales alpha data com website http www alpha data com Address 611 Corporate Circle Suite H...