Allegro MicroSystems A1321 Description Download Page 11

Ratiometric Linear Hall Effect Sensor ICs 

for High-Temperature Operation 

A1321, A1322, 

and

 A1323 

10

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Power Derating

The device must be operated below the maximum junction 
temperature of the device, T

J(max)

. Under certain combinations of 

peak conditions, reliable operation may require derating sup-
plied power or improving the heat dissipation properties of the 
application. This section presents a procedure for correlating 
factors affecting operating T

J

. (Thermal data is also available on 

the Allegro MicroSystems Web site.)

The Package Thermal Resistance, R

JA

, is a 

fi

 gure of merit sum-

marizing the ability of the application and the device to dissipate 
heat from the junction (die), through all paths to the ambient air. 
Its primary component is the Effective Thermal Conductivity, 
K, of the printed circuit board, including adjacent devices and 
traces. Radiation from the die through the device case, R

JC

, is 

relatively small component of R

JA

.  Ambient air temperature, 

T

A

, and air motion are signi

fi

 cant external factors, damped by 

overmolding.

The effect of varying power levels (Power Dissipation, P

D

), can 

be estimated. The following formulas represent the fundamental 
relationships used to estimate T

J

, at P

D

                               P

= V

IN

 

×

 I

IN    

(1)



T = P

D

 

×

 R

JA

  (2)

 

                        T

J

 = T

A

 + 

Δ

T  

(3)

For example, given common conditions such as: T

A

= 25°C,

V

CC 

= 12 V, I

CC 

= 4 mA, and R

JA

 = 140 °C/W, then:

 

 P

= V

CC

 

×

 I

CC 

= 12 V 

×

 4 mA = 48 mW

T = P

D

 

×

 R

JA

 = 48 mW 

×

 140 °C/W = 7°C

 

 T

J

 = T

A

 + 

T = 25°C + 7°C = 32°C

A worst-case estimate, P

D(max)

, represents the maximum allow-

able power level (V

CC(max)

, I

CC(max)

), without exceeding T

J(max)

at a selected R

JA

 and T

A

.

Example

: Reliability for V

CC

 at T

=

 

150°C, package UA, using 

minimum-K PCB.

Observe the worst-case ratings for the device, speci

fi

 cally:  

R

JA 

=

 

165°C/W, T

J(max)  

=

 

165°C, V

CC(max) 

=

 

5.5 V, and 

I

CC(max)  

=

 

8

 

mA.

Calculate the maximum allowable power level, P

D(max)

. First, 

invert equation 3:

     

T

max

 = T

J(max)

 – T

A

 = 165

 

°C

 

 

150

 

°C = 15

 

°C

This provides the allowable increase to T

J

 resulting from internal 

power dissipation. Then, invert equation 2:



P

D(max) 

T

max

 ÷ R

JA 

= 15°C ÷ 165  °C/W = 91 mW

Finally, invert equation 1 with respect to voltage:

     V

CC(est)

 = P

D(max) 

÷  I

CC(max)

 =  91 mW ÷ 8 mA = 11.4 V

The result indicates that, at T

A

, the application and device can 

dissipate adequate amounts of heat at voltages 

V

CC(est)

.

Compare V

CC(est)

 to V

CC(max)

. If V

CC(est)

 

 V

CC(max)

, then reli-

able operation between V

CC(est)

 and V

CC(max)

 requires enhanced 

R

JA

.  If V

CC(est)

 

 V

CC(max)

, then operation between V

CC(est)

 and 

V

CC(max)

 is reliable under these conditions.   

Summary of Contents for A1321

Page 1: ...y for its use nor for any infringements of patents or other rights of third parties which may result from its use Ratiometric Linear Hall Effect Sensor ICs for High Temperature Operation A1321 A1322 a...

Page 2: ...rnal high frequency clock reduces the residual offset voltage normally caused by device overmolding temperature dependencies and thermal stress The high frequency clock allows for a greater sampling r...

Page 3: ...00 A1323LLHLT T2 7 in reel 3000 pieces reel Surface Mount 40 to 150 A1323LUA T3 Bulk 500 pieces bag SIP through hole 1Contact Allegro for additional packing options 2This variant is in production howe...

Page 4: ...croSystems Inc 115 Northeast Cutoff Worcester Massachusetts 01615 0036 U S A 1 508 853 5000 www allegromicro com Terminal List Symbol Number Description Package LH Package UA VCC 1 1 Connects power su...

Page 5: ...30 kHz Clock Frequency fC 150 kHz Output Characteristics over VCC range unless otherwise noted Noise Peak to Peak4 VN A1321 Cbypass 0 1 F no load 40 mV A1322 Cbypass 0 1 F no load 25 mV A1323 Cbypass...

Page 6: ...Sens at TA min5 Sens TAmin From cold to room temperature 6 4 Sensitivity Drift6 SensDrift TA 25 C after temperature cycling and over time 2 LH Package Delta Sens at TA max5 Sens TAmax From hot to roo...

Page 7: ...ount proportional to the magnetic field applied Conversely the application of a north pole will decrease the output voltage from its quiescent value This proportionality is specified as the sensitivit...

Page 8: ...Average Positive Linearity Lin vs Temperature Vcc 5 V 95 96 97 98 99 100 101 102 103 104 105 40 20 0 25 85 115 125 150 TA C Lin Average Negative Linearity Lin vs Temperature Vcc 5 V 95 96 97 98 99 10...

Page 9: ...5 V 2 2 5 3 3 5 4 4 5 5 5 5 6 40 20 0 25 85 115 125 150 TA C Sens mV G A1322 A1321 A1323 Average Delta Quiescent Output Voltage Vout q T vs Temperature in readings at each temperature are relative to...

Page 10: ...a each side connected by thermal vias 110 C W Package UA 1 layer PCB with copper limited to solder pads 165 C W Additional thermal information available on Allegro website 6 5 4 3 2 1 0 20 40 60 80 10...

Page 11: ...of varying power levels Power Dissipation PD can be estimated The following formulas represent the fundamental relationships used to estimate TJ at PD PD VIN IIN 1 T PD R JA 2 TJ TA T 3 For example gi...

Page 12: ...ary to meet application process requirements and PCB layout tolerances Branding scale and appearance at supplier discretion A PCB Layout Reference View Standard Branding Reference View 1 Branded Face...

Page 13: ...upport device or system or to affect the safety or effectiveness of that device or system The information included herein is believed to be accurate and reliable However Allegro MicroSystems Inc assum...

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