Alinco DR-620, Service Manual

Page: 22 / 56

2Ü) M64Ü76ÄGP (XÄÜ915)
Dual PLL Synthesizer
XBo
□
1
20
□
GND
SI
□
2
19 □ Xin
CPS
□
3 18 □ Xout
RST
□
4
s
o>
17 □ OP2
Vcc
□
5
o
>1
16 □ OP1
Fini
□
6
O )
"Ö
15 □ Fin2
Lockl
□
7 14 □
Lock2
Pd1
□
8
13 □ PD2
VT1
□
9
12
□
VT2
VF
□
10 11
□
GND
Parameter Symbol Condition Min. Typ. Max. Unit
Power supply voltage Vcc
Fin=a0~520MHz
Vin=-10dBm
2.l 5.5 V
LPF supply voltage VF
9 12 V
Local oscillator input level Vin
Fin=a0~520MHz
-20 -4 dBm
Local oscillator input frequency Fin
Vin=-20~-4dBm
Vcc=2.l~5.5V
80 520 MHz
Xin input level Vxin
Vcc=2.l~5.5V
Fxin=10~25MHz
Sine wave
0.4 1.4
Vp-p
Xin input frequency Fxin
Vcc=2.l~5.5V
Vxin=0.4~1.4Vp-p
10 25 MHz
Equivalent Circuit
Fin2(Í5)-------- [
a
MP~>»
SW
SW
XB
o
( T ) ----- < ^ M P
Xout (18)-
X in ^ i) -
SW
Fin 1(6
i—
SW
s i ® -
I
C P S (3 )-
1/64, 65
2 modules
prescaler
1/2
osc
divider
1/64, 65
2 modulus
prescaler
Data latch (17bit)
Local 2
programmable divider
Data latch (16bit)
Reference frequency 2
programmable divider
Reference frequency 1
programmable divider
Data latch (16bit)
Local 1
programmable divider
Data latch (17bit) —
Data latch (6bit)
21 bit shift resistor
21 bit pulse counter
" ( d ) "
RST
Latch
selector
(ij)G N D
B U £> ------ (¡7 )0 P 2
GND
22