Alinco DJ-190, Service Manual

Page: 7 / 41

No.
Pin Name
Signal
I/0
Logic
Description
No.
Pin Name
Signa1
I/0
Logic
Description
1
C1
C1
-
-
-
51
P15/SEG39
F/KEY
I
Active low
Function key input
2
VL1
VL1
I
A/D
LCDpowersupply
52
P14/SEG38
K10
I
-
3
P67/AN7
SMT
I
A/D
S-meterinput
53
P13/SEG37
K11
I
-
4
P66/AN6
SQL
I
A/D
Noise level input for squelch
54
P12/SEG36
K12
I
-
5
P65/AN5
BAT
I
A/D
Low battery detection input
55
P11/SEG35
K13
l
-
6
P64/AN4
BP5
I
A/D
Band plan5
56
P11/SEG34
K14
I
-
Key matrix input
7
P63/CLK22/AN3
BP4
I
Band plan4
57
P07/SEG33
SFT
O
-
VCO frequency range change
8
P62/CLK21/AN2
UL
I
Activehigh
PLL unlock signal input
58
P06/SEG32
SD
O
Active low
Signa detection output
9
P61/SOUT2/AN1
BP1,2
I
A/D
Band plans 1 and 2
59
P05/SEG31
AFC
O
Active high
AF tone control output
10
P60/SIN2/ANO
MOM
I
Activelow
Monitor key input
60
P04/SEG30
DA4
O
-
11
P57/ADT/DA2
CTOUT
O
D/A
CTCSS tone output
61
P03/SEG29
DA3
O
-
12
P56/AD1
DTOUT
O
D/A
62
P02/SEG28
DA2
O
-
DA converter for electronic volume and output power
13
P55/CNTR1
TSQD
I
Activelow
CTCSS tone detection input
63
P01/SEG27
DA1
O
-
14
P54/CNTRO
BEP
O
Pulse
Beep tone output/Band plan 3
64
P00/SEG26
DA0
O
-
15
P53/RTP1
STB2
I/O
Active low/pulse
CTCSS unit detection/Strobe signal to CTCSS unit
65
P37/SEG25
S25
O
-
16
P52/RTP0
MUTE
I/O
Activehigh
Microphone mute
66
P36/SEG24
S24
O
-
17
P51/PWM1
CLK
O
Pulse
Serial clock output for PLL, CTCSS
67
P35/SEG23
S23
O
-
18
P50/PWM0
DATA
O
Pulse
Serial data output for PLL CTCSS
68
P34/SEG22
S22
O
-
19
P47/SRDY1
ACK
I/0
Pulse
Band plan 6
69
P33/SEG21
S21
O
-
20
P46/SCLK1
STB1
O
Pulse
Strobe for PLL IC
70
P32/SEG20
S20
O
-
21
P45/TXD1
UTX
O
Pulse
UART data transmission output
71
P31/SEG19
S19
O
-
22
P44/RXD1
URX
I
Pulse
UART data reception input
72
P30/SEG18
S18
O
-
23
P43/D/TOUT
TBST
O
Pulse
Tone burst (1750Hz) output (European version)
73
SEG17
S17
O
-
24
P42/INT2
RE2
I
Activelow
74
SEG16
S16
O
-
25
P41/1NT1
RE1
I
Activelow
Rotary encoder lnput
75
SEG15
S15
O
-
26
P40
PTT
I
Activehigh
PTT input
76
SEG14
S14
O
-
27
P77
DSW
O
Activelow
77
SEG13
S13
O
-
28
P76
STD
I/O
Activehigh
Deviation adjustment during transmission
78
SEG12
S12
O
-
LCD segment signal
29
P75
DSD
I
Pulse
Deviation adjustment during transmission
79
SEG11
S11
O
-
30
P74
T3C
O
Active low
TX power ON/OFF output
80
SEG10
S10
O
-
31
P73
P3C
O
Active low
PLL power ON/OFF output
81
SEG9
S9
O
-
32
P72
AFP
O
Activelow
AFAMP power ON/OFF output
82
SEG8
S8
O
-
33
P71
R3C
O
Activelow
RX power ON/OFF output
83
SEG7
S7
O
-
34
P70/INT0
BU
I
Activelow
Backup signal detection input
84
SEG6
S6
O
-
35
RESET
RST
I
Activelow
Resetinput
85
SEG5
S5
O
-
36
XCIN
XCIN
-
-
-
86
SEG4
S4
O
-
37
XCOUNT
XCOUT
-
-
-
87
SEG3
S3
O
-
38
XIN
XIN
-
-
Main clock input
88
SEG2
S2
O
-
39
XOUT
XOUT
-
-
Main clock output
89
SEG1
S1
O
-
40
VSS
GND
-
-
CPU ground
90
SEG0
SO
O
-
41
P27
PSW
I
Activelow
Power switch input
91
VCC
VDD
-
-
CPU power terminal
42
P26
SCL
O
Pulse
Serial clock for EEPROM
92
VREF
VREF
-
-
AD converter power supply
43
P25
C3C
O
Activehigh
C3 power ON/OFF output
93
AVSS
AVSS
-
-
AD converter ground
44
P24
SDA
O
Pulse
Serial data for EEPROM
94
COM3
COM3
-
-
-
45
P23
LMP
O
Activehigh
Lamp ON/OFF
95
COM2
COM2
O
-
LCD COM2 output
46
P22
T/KEY
I
Activelow
Tone burst/LPTT input
96
COM1
COM1
O
-
LCD COM1 output
47
P21
K00
I/O
-
Band plan BP7 input
97
COM0
COM0
O
-
LCD COM0 output
48
P20
K01
O
-
Key matrix output
98
VL3
VL3
I
-
LCD power supply
49
P17
K02
O
-
99
VL2
VL2
I
-
LCD power supply
50
P16
K03
O
-
100
C2
I
-
-
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