![Alinco DJ-100 Service Manual Download Page 5](http://html1.mh-extra.com/html/alinco/dj-100/dj-100_service-manual_2897282005.webp)
DJ-100
5
IF AMP
DET
FM IF IC U502
SP MUTE
U203A(1/2)
DTMF/2-TONE/5-TONE
HPF
52
U206
MPU
P0
2
AF
U203B(2/2)
AF AMP
SP
AF PA
LS200
U205
Q202,Q206
VOL
P3
0,
P3
2,
P3
3,
P3
6,
P3
7
U200
AQUA
P61
J200
56
50
P0
0
SQ
L
FILTER
SW
COMPARATOR
PHASE
CHARGE
PUMP
5KHz/6.25KHz
5KHz/6.25KHz
PLL IC U503
REF OSC
I/N
I/M
PLL DATA
LPF
D507,D518
VCO
Q517
BUFF AMP
Q516
19
.2
00
M
H
z
RF AMP
Q515
RF AMP
Q519
Q518
T/R SW
P26
(U206 Pin 17)
MOD
MOD
Ripple
Filter
5C
Q512
From MPU
X5
00
5M
LD
U503
PLL IC
R597
C543
U206
P53
MPU
D501
CIRCUIT DESCRIPTION
preset value. If it matches, and controls the SP MUTE (P61)
the speaker on output sounds microprocessor (U206)
according to the squelch results.
3-2-2-2 High-speed data (DTMF/2 tone/5 tone)
The demodulated signal from the IF IC (U502) is
high-pass filter by U203A (1/2) to remove a low-speed data.
The MPU digitizes this signal, performs processing such as
DC restoration, and decodes the signal.(See Fig.5)
Fig.5
4. PLL frequency synthesizer
The PLL circuit generates the first local oscillator signal
for reception and the RF signal for transmission.
4-1.PLL circuit
A reference frequency of 5 kHz or 6.25 kHz is produced
by dividing the 19.200 MHz reference frequency of the
TCXO (X500) with PLL IC (U503). Comparison frequency
is produced by amplifying VCO output with an RF amplifier
(Q519) and dividing it with the PLL IC.
The PLL synthesizer with 5 kHz and 6.25 kHz step is
configured by comparing phases of the reference
frequency and comparison frequency.
The phase difference between reference frequency and
comparison frequency passes through a charge pump in
the PLL IC, then ripples are removed with a loop filter with
low-range passing characteristics to produce VCO control
voltage (lock voltage). (See Fig. 6)
4-2.VCO circuit
The VCO produces a desired frequency directly with a
Colpits oscillation circuit containing an oscillation transistor
(Q517) used for both transmission and reception.
The VCO control voltage is applied to varicap (D507,
D518) to produce a desired frequency.
The P26 terminal (pin 17) of the MPU (U206) goes "H"
during transmission, and the R/T control switch (Q518) is
turned OFF to change oscillation frequency. (See Fig. 6)
Fig.6
4-3. Unlock Detector circuit
If a pulse signal appears at the LD pin of U502, an
unlock condition occurs, and the DC voltage obtained from
C543, R597 and D501 causes the voltage applied to the
microprocessor to go low. When the microprocessor
detects this condition, the transmitter is disabled, ignoring
the push-to-talk switch input signal. (See Fig. 7)
Fig.7
Summary of Contents for DJ-100
Page 31: ...PC board views DJ 100 31 ...
Page 32: ...PC board views DJ 100 32 ...
Page 33: ...PC board views DJ 100 33 ...
Page 34: ...PC board views DJ 100 34 ...