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Model no.:CT-21CQS5CPT.doc
version 1.0
35
4 EEPROM AT24C08
4.1 Features
Data EEPROM internally organized as 1024/2048 bytes and 64/128 pages×16 bytes
Page protection mode, flexible page-by-page hardware write protection -Additional
protection EEPROM of 64/128 bits, bit per data page 1-Protection setting for each data
page by writing its protection bit -Protection management without switching WP pin
Low power CMOS
Vcc=2.7 to 5.5V operation
Two wire serial interface bus, IIC-Bus compatible
Filtered inputs for noise suppression with Schmitt trigger
Clock frequency up to 400 kHz
High programming flexibility
−
Internal programming voltage
−
Self timed programming cycle including erase
−
Byte-write and page-write programming, between 1 and 16 bytes
−
Typical programming time 6ms(< 1 0ms) for up to 16 bytes
High reliability
−
Endurance 106 cycles 1)
−
Data retention 40 years 1)
−
ESD protection 4000 V on all pins
8 pin DIP/DSO packages
Available for extended temperature ranges
−
Industrial:
- 4 0 t o
+85
−
Automotive:
- 4 0 t o
+125
4.2 Pin Configuration
4.3 Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is
open-drain driven and may be wire-ORed with any number of other open-drain or
open-collector devices. The AT24C08 only uses the A2 input for hardwire addressing and a
total of two 8K devices may be addressed on a single bus system. The A0 and A1 pins are
no connects.
Summary of Contents for CT-14CQS5CPT
Page 7: ...Model no CT 21CQS5CPT doc version 1 0 7 SAFETY SYMBOL DESCRIPTION ...
Page 11: ...Model no CT 21CQS5CPT doc version 1 0 11 Remote Control ...
Page 29: ...Model no CT 21CQS5CPT doc version 1 0 29 BLOCK DIAGRAM ...
Page 33: ...Model no CT 21CQS5CPT doc version 1 0 33 ...
Page 38: ...Model no CT 21CQS5CPT doc version 1 0 38 APPENDIX ...
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