Akai LCT42Z7TAP, Service Manual

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MT8206
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
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DRAM Controller
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Supports up to 32M-byte SDR/DDR DRAM
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Supports 2x16 bit SDR/DDR bus interfaces
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Build in a DRAM interface programmable clock to
optimize the DRAM performance
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Programmable DRAM access cycle and refresh
cycle timings
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Maximum DRAM clock rate is 175MHz
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Support 3.3/2.5-Volt SDR/DDR Interface
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Video Output
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Embedded TV pattern generator
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Interlaced 50Hz to 120Hz
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Support up to 1080P resolution
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Dual-channel 6/8/10-bit LVDS output
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Support video output mirror and upside down
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2D-Graphic/3 OSD processor
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Embedded Two backend RGB domain OSD
planes and one YUV domain OSD
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Support Text/Bitmap decoder
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Support line/rectangle/gradient fill
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Support bitblt
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Support color Key function
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Support Clip Mask
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Support Alpha blending with video output
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65535/256/16/4/2-color bitmap format OSD,
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Automatic vertical scrolling of OSD image
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Support OSD mirror and upside down
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Host Micro controller
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Turbo 8032 micro controller
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Built-in internal 373 and 8-bit programmable lower
address port
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2048-bytes on-chip RAM
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Up to 4M bytes FLASH-programming interface
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Supports 5/3.3-Volt. FLASH interface
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Supports power-saving mode
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Supports additional serial port
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IR control serial input
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Support dual RS232 interfaces for external source
interface
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Support 2 PWMs output
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Support DDC2Bi
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Programmable GPIOs setting for complex external
device control
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Outline
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388-pin BGA package
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3.3/1.8-Volt. Dual operating voltages
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0.18um process
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