Akai LCT2716, Service Manual, Page: 60 / 76

Issued Date: September 18, 2003
Model No.: V270W - L03
Approval
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram .
Signal Item Symbol Min. Typ. Max. Unit Note
Clock Frequency 1/Tc 70 74.25 80 MHZ -
Frame Rate Fr 48 60 - Hz Tv=Tvd+Tvb
Total Tv 730 750 850 Th -
Display Tvd 720 720 720 Th -
Vertical Active Display Term
Blank Tvb 10 30 130 Th -
Total Th 1450 1650 2000 Tc Th=Thd+Thb
Display Thd 1280 1280 1280 Tc -
Horizontal Active Display Term
Blank Thb 170 370 720 Tc -
Note: Because of this module is operated by DE only mode, Hsync and Vsync input signals should be set
to low logic level or ground. Otherwise, this module would operate abnormally.
INPUT SIGNAL TIMING DIAGRAM
DATA
DE
T
hd
DCLK
T
c
Valid display data (1280 clocks)
T
hb
DE
T
h
T
v
T
vb
T
vd
15 / 26
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
Version 2.0