1
1
2
2
3
3
4
4
5
5
6
6
D
D
C
C
B
B
A
A
4
200
Scenic
View
Dr.
Cumberland,
RI
02864
6
2018/9/13
Sheet:
of
CONVERT-20180830.SchDoc
ADA2_RP.PrjPcb
Originally
Drawn
By:
Project:
Sheet:
Variant:
V
ariant
name
not
interpreted
Last
Modified
By:
Last
Modified:
Copyright
2017,
inMusic
Brands
All
Rights
Reserved
2
3
1
U19A
NJM4580M
R132
1.50K
R136
1.50K
R134
499
R133
3.74K
R135
3.74K
R137
4.99K
6
5
7
U19B
NJM4580M
R140
499
R138
4.99K
33pF #NAME?
C133
680pF #NAME?
C122
680pF #NAME?
C121
IN1_
T
O
_
A
D
C
2
3
1
U20A
NJM4580M
R142
1.50K
R146
1.50K
R144
499
R143
3.74K
R145
3.74K
R147
4.99K
6
5
7
U20B
NJM4580M
R150
499
R148
4.99K
33pF #NAME?
C156
680pF #NAME?
C154
680pF #NAME?
C148
IN2_
T
O
_
A
D
C
VBIAS
VBIAS
10uF #NAME?
C149
0.1uF #NAME?
C150
10uF
#NAME
?
C123
10uF
#NAME
?
C124
10uF
#NAME
?
C125
10uF
#NAME
?
C126
10uF
#NAME
?
C127
10uF #NAME?
C142
0.1uF #NAME?
C143
0.1uF #NAME?
C139
10uF #NAME?
C134
0.1uF #NAME?
C135
+
100uF
#NAME?
C138
nRESET
MCLK BCLK LRCK
Slave
Mode
Optimal
Data
Placement
=
OFF
All
Channels
On
High
Pass
Filter
=
ON
PCM
mode
I2C/Parallel
Selected
Parallel
Control
Mode
24-bit,
I2S
Short
Delay
Filter
=
ON
Sharp
Roll-Off
Filter
=
ON
Auto
Speed
1
3
2
D18 BAT54S
1
3
2
D19 BAT54S
VOUT2
1
VIN2
2
EN
3
VIN1
4
VOUT1
5
GND1
6
NP1
7
GND
8
NP2
9
GND2
10
V
OU
T
2
VIN
2
E
N
VIN
1
V
OU
T
1
G
ND
1
NP
1
G
ND
NP
2
G
ND
2
U17
AK1110
R139 10.0K
R141 10.0K
10uF
#NAME
?
C144
0.1uF
#NAME
?
C145
1,500pF #NAME?
C155
1,500pF #NAME?
C157
R149
47.5
+3.3
V
+6V
VREF_ADC
AVDD_ADC
VBIAS
+3.3
V
+3.3
V
AVDD_ADC
1
3
2
D17 BAT54S
1
3
2
D16 BAT54S
0.1uF
#NAM
E?
C160
0.1u
F
#N
AME?
C162
-
4
+
8
U19C
NJM
458
0M
0.1uF
#NAM
E?
C161
0.1u
F
#N
AME?
C163
-
4
+
8
U20C
NJM
458
0M
+VA
-VA
SDIN
nRESET
MCLK BCLK LRCK
SDOUT1 SDOUT2
10uF #NAME?
C152
0.1uF #NAME?
C153
10uF #NAME?
C137
10uF #NAME?
C141
10uF #NAME?
C147
10uF
#NAME
?
C128
10uF
#NAME
?
C129
10uF
#NAME
?
C130
10uF
#NAME
?
C131
0.1uF #NAME?
C136
0.1uF #NAME?
C140
0.1uF #NAME?
C146
1uF #NAME?
C151
All
outs
2.8Vpp
DAC
VOUT2
1
VIN2
2
EN
3
VIN1
4
VOUT1
5
GND1
6
NP1
7
GND
8
NP2
9
GND2
10
VOU
T
2
VIN
2
E
N
VIN
1
VOU
T
1
G
ND
1
NP
1
G
ND
NP
2
G
ND
2
U18
AK1110
+3.3
V
10uF
#NAME
?
C132
DAC
L
-
DAC
L
+
D
A
CR-
D
A
CR+
DAC
3
-
DAC
3
+
+6V
AVDD_DAC
VREF_DAC
Q11
1
Q5
2
Q4
3
Q6
4
Q3
5
Q2
6
Q1
7
GND
8
Q0
9
CLK
10
RST
11
Q8
12
Q7
13
Q9
14
Q10
15
VCC
16
Q
11
Q5
Q
4
Q
6
Q
3
Q2
Q1
G
ND
Q0
C
LK
RS
T
Q8
Q7
Q9 Q1
0
V
CC
U23 LV4040A
3
1
2
Q21 MMBT4401
R155
10.0K
MCLK
R164
10.0K
R163
1.00K
R159
47.5
R162
47.5
+3.3
V
BCLK
LRCK
nRESET
3
VCC
4
GND
2
OFF
1
X1
22.5792MHz
0.1uF
#NAME?
C159
0.1uF #NAME?
C158
+3.3
V
R158
47.5
MCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
J6
ZIF-BOTTOM
-CONTACT
0.
5m
m
AN_EN nRESET MUTE_ROCK2
SDOUT1
SDOUT2
BCLK
SDIN
R153
10.0K
FRO
M A
Z01
CR-J1
4
3.3V Logic
R151
0.0
R152
0.0
1
2
3
Q19 MMBT4403
R161
100K
MUTE
1
2
3
Q20 BSS138
R156
100K
R160 100K
R157 121K
MUTE_ROCK2
MUTING
CIRCUIT
-VA
+6V
DAC
4
-
DAC
4
+
+3.3
V
MCLK
1
BCLK/DCLK
2
LRCK/DSDL1
3
SDTI1/DSDR1
4
SDTI2/DSDL2
5
DSDR2/TDMO1
6
DZF/SMUTE
7
CAD1/DCHAIN
8
SDA/CDTI/TDM0
9
SCL/CCLK/TDM1
10
CAD0_I2C/CS/DIF
11
CAD0_SPI/PS
12
I2C
13
AOUTL1P
14
AOUTL1N
15
16
17
AOUTR1N
18
AOUTR1P
19
AOUTL2P
22
AOUTL2N
23
25
24
AOUTR2N
26
AOUTR2P
27
AVSS
20
AVDD
21
LDOE
28
TVDD
29
DVSS
30
VDD18
31
PDN
32
MC
LK
B
C
LK
/D
C
LK
LR
C
K
/D
S
DL
1
S
DTI1
/D
S
DR
1
S
DTI2
/D
S
DL
2
D
S
DR2
/TDM
O1
DZF
/S
MUT
E
C
AD1
/D
C
HAI
N
S
DA
/C
DTI
/TDM
0
SC
L/CC
LK
/TDM
1
C
AD0_I2C/CS/DI
F
C
AD0_SPI/PS
I2
C
A
OU
TL1P
A
OU
TL1
N
A
OU
TR1N
A
OU
TR1P
A
OU
TL2P
A
OU
TL2
N
A
OU
TR2N
A
OU
TR2P
A
V
SS
AVDD
LD
OE
TVD
D
DV
SS
VDD1
8
PDN
VREFH
VREFL
PAD
33
U22 AK4454
NC
1
VREFL1
2
VREFH1
3
AIN2N
4
AIN2P
5
AVDD
6
AVSS
7
TESTIN1
8
TESTIN2
9
TESTIN3
10
TESTIN4
11
NC
12
TESTIN5
13
TESTIN6
14
TEST
15
MCLK
16
TVDD
17
DVSS
18
VDD18
19
PDN
20
PW0
21
PW1
22
PW2
23
M/S
24
BCLK/DCLK
25
LRCK/DSDOL1
26
TDMIN/DSDOR1
27
SDTO1/DSDOL2
28
TESTO2
29
OVF
30
CKS0/SDA/CDTI
31
CKS1/CAD0_I2C/CS
32
CKS2/SCL/CCLK
33
CKS3/CAD1
34
SLOW/DCKB
35
SD/PMOD
36
DIF0/DSDSEL0
37
DIF1/DSDSEL1
38
TDM0
39
TDM1
40
PS/CAD0_SPI
41
I2C
42
DP
43
HPFE/DCKS
44
LDOE
45
ODP
46
AIN1P
47
AIN1N
48
PAD
49
N
C
VREFL
1
VREFH
1
AIN2
N
AIN2P
AVDD
A
V
SS
TE
S
TIN
1
TE
S
TIN
2
TE
S
TIN
3
TE
S
TIN4
N
C
TE
S
TIN
5
TE
S
TIN
6
TE
ST
MC
LK
TVD
D
DV
SS
VDD1
8
PDN
PW
0
PW
1
PW
2
M/S
B
C
LK
/D
C
LK
LR
C
K
/D
S
D
O
L1
TDMIN
/D
S
D
O
R
1
S
DT
O
1/
D
S
D
O
L2
TE
S
T
O2
O
VF
C
K
S0/S
DA
/C
DTI
CKS1/CAD0_I2C/CS
C
K
S
2/SC
L/CC
LK
C
K
S3/C
AD
1
S
LO
W
/D
C
KB
S
D
/PM
OD
DIF
0/
D
S
D
S
EL
0
DIF1
/D
S
D
S
EL
1
TDM
0
TDM
1
PS/CAD0_SPI
I2
C
DP
H
PFE
/D
C
K
S
LD
OE
O
DP
AIN1P AIN1
N
PAD
U21
AK5552
47pF
#NAME?
C252
47pF
#NAME?
C253
47pF #NAME?
C254
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
4
1
U33A AHC1G125
LRCK
GND
R29
47.5
VCC
5
VCC
GND
3
U33B
AHC1G125
0.1u
F
#NAME
?
C165
+3.3
V
GND
Summary of Contents for ADA2
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