Aiwa XP-ZR850, Service Manual

Page: 13 / 38

13 13
XP-ZR850
XP-ZR850
5-2. SCHEMATIC DIAGRAM – EGL BOARD – • See page 11 for Waveform. • See page 20 for IC Pin Function Description.
(Page 16)
C602
C694
R602
C601
R603
R608
R609
C609
R624 R623
R618
C629
R621
C631
C632
C695
C618
C617
C619
C624
C642
R638
R629
R628
R635
R636
R634
C650 C653
R637
C654
R639 R642
R649
R604
C610
C603
R653
R613
C667
R644
X602
C682
C683
R611
R612
D601
C684
D602
R615
R616
R617
Q602
R606
R631
R610
C686
C687
C662
IC1602
RB601
C627
C607
C677
C664
C675
C676
C663
R406
C649
R656
R655
CN601
CN9001
C608
R625
C648
R650
R651
C626 C646
C659
R647
C678
R619
C644
C639
R668 R407
R663
R667
R662
R669
R632
R620
VDR601
IC603
IC604
470p
0.1
0
22 6.3V
10
47k
22k
2200p
10k 10k
1k
0.1
1k
0.1
0.1
4700p
4700p
4700p
4700p
0.1
0.1
0
2.2k
2.2k
1M
100k
10k
4700p 0.47
220k
0.1
47k 47k
22k
10
0.1
100
4V
10k
0
0.1
10
22MHz
47p
100p
470k
470k
HVL375CM
0.1
HVL375CM
100k
470k
470k
RT3T67M
0
220k
100k
47
6.3V
0.1
0.1
AK6510CL-L
22k
22 6.3V
0.01
0.1
47
6.3V
0.1
0.1
0.1
0
0.47
100k
47k
15P
60P
22p
10k
0.1
100k
100k
0.1 0.1
0.1
1M
22
6.3V
0.1
0.1
100k 0
0
0
0
47k
0
R614 0
100k
CXR711260-218H2
MSM56X16160F-20T3
FE(A) SE(B) TE(F) CE(E)
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
MDP
SYNC
POWERLT
SI0
SO0
XSCK0
COLDST
PG6 PG5
LCD_XRST
SEL_LINE_HP
OPEN
CHGMNT
BATMNT
AD_RMKEY
AD_KEY2 AD_KEY1
DCINMNT
CASINO_WAKE
XADEVENT
XRST
CLOCK_SHIFT
HOLD
X_METAL_DTC
PWMR
PWML
DAMPCLK
AOUTL
AOUTR
PWRSW
EN1
EN2
HP_LATCH
MUTE
SDA0
SDA1 SDA2
SDA3
SDA4 SDA5 SDA6 SDA7 SDA8 SDA9 SDA10 SDA11 SDCLK SDCKE SDXRAS SDXCS SDXCAS SDUDQM SDLDQM SDDQ5 SDDQ1 SDDQ2 SDDQ3 SDDQ4 SDDQ6 SDDQ7 SDDQ8 SDDQ9 SDDQ10 SDDQ11 SDDQ12 SDDQ13 SDDQ14 SDDQ15 SDDQ16
LCD_XSCK_O LCD_SDT_O LCD_SDT_I
SI0
XSCK0 SO0
SI0
HP_LATCH
SEL_LINE_HP
AOUTR
AOUTL
BEEP
PWRSW
XRST
POWERLT
SO0
SXCK0
COLDST
XADEVENT
SYNC
CASINO_WAKE
MUTE
MDP
FG
SRDR
SFDR
TRDR
TFDR
FRDR
FFDR
LCD_SDT_I
LCD_SDT_O
LCD_XSCR_O
LCD_CS
LCD_XRST
AD_KEY2
AD_KEY1
CNGMNT
HOLD
OPEN
DCINMNT
AD_RMKEY
PG5
PG6
X_METAL_DTC
TSB
FE(A)
SE(B)
CE(E)
TE(F)
T+
T-
F-
F+
F+
F-
T+
T-
SDDQ1
SDDQ2
SDDQ3
SDDQ4
SDDQ5
SDDQ6
SDDQ7
SDDQ8
SDLDQM
SDXWE
SDXCAS
SDXRAS
SDXCS
SDA11
SDA10
SDA0
SDA1
SDA2
SDA3
SDDQ9
SDDQ10
SDDQ11
SDDQ12
SDDQ13
SDDQ14
SDDQ15
SDDQ16
SDUDQM
SDCLK
SDCKE
SDA4
SDA5
SDA6
SDA7
SDA8
SDA9
SDXWE
TSB
TU_CE
BATMNT
CLOCK_SHIFT
TC_CE
FG
BEEP
LCD_CS
OPGSW
A
B
RF
OPSTB
LD
PD
GND_A
VCC
E
F
F+
T-
T+
F-
F-
LINEOUT_DTC
TSB
LED1
LED2
D-R
GND_AU
D-L
AD_RMKEY
DCINMNT
VIN
OPEN
HOLD
VSTB1
VSTB2
CNGMNT
AD_KEY1
AD_KEY2
LCD_XRST
LCD_CS
LCD_CLOCK
LCD_DATA_O
LCD_DATA_I
FFDR
FRDR
TFDR
TRDR
SFDR
SRDR
FG
MDP
F+
T-
T+
MUTE
CASINO_WAKE
SYNC
WAKE
COLDST
CLOCK
LATCHB
GND
RSTB
VCC2
VAPC
PAPC
VCC0
VCC1
PWRSW
BEEP
A-L
A-R
GND
GND_A
SEL_LINE_HP
SI0/LCD_BL/XEXBAT
VG
TU_CE/OPOUT DTC
VCC
DQ1
DQ2
VSSQ
DQ3
DQ4
VCCQ
DQ5
DQ6
VSSQ
DQ7
DQ8
VCCQ
LDQM
VSS
DQ16
DQ15
VSSQ
DQ14
DQ13
VCCQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VCCQ
NC
XWE
XRAS
XCS
A11
A10
A0
A1
A2
A3
VCC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
VSS
XCS
DO
WP
GND
VCC
HOLD
SCK
DI
-1-2
CLOCK SHIFT
XCAS
SD-RAM
EEPROM
HP_LATCH/DOUT
DATA_SO0
OPTICAL
PICK-UP
BLOCK
SYSTEM CONTROLLER,
DSP,LCD DRIVER
CSP
(Chip Size Package)
(DAX-25EV)
The components identified by mark
0
or dotted
line with mark
0
are critical for safety.
Replace only with part number specified.
Ver. 1.3
When EGL board is replaced or EEPROM (IC1602) on the EGL board is
replaced, patch processing is needed.
Confirm about information of patch processing to each service headquarters.