Aiwa XP-SP90, Service Manual

Page: 19 / 22

23
42 PCMDI I D/A interface.serial data input (two's complement, MSB first).
43 BCK O D/A interface. Bit clock output.
44 BCKI I D/A interface. Bit clock input.
45 VSS2 — GND.
46 VDD2 — Power supply (+3V).
47 XUGF O XUGF output. Switch to MNT1 or RFCK output by a command. (Not connected)
48 XPCK O XPLCK output. Switch to MNT0 output by a command. (Not connected)
49 GFS O GFS output. Switch to MNT3 or XRAOF output by a command.
50 C2PO O C2PO output. Switch to GTOP output by a command. (Not connected)
51 XTSL I Crystal selector input. Low: 16.9344MHz; High: 33.8688MHz.
52 C4M O 4.2336MHz output. (Not connected)
53 DOUT O Digital out output.
54 EMPH O
Output a high signal when the playback disc has emphasis, and a low signal when
there is no emphasis. (Not connected)
55 EMPHI I Input a high signal when de-emphasis is on, and a low signal when de-emphasis is off.
56 WFCK O WFCK output. (Not connected)
57 SCOR O Output a high signal when either subcode sync S0 or S1 is detected.
58 SBSO O Sub P to W serial output.(Not connected)
59 EXCK I SBSO readout clock input.
60 VSS3 — GND.
61 VDD3 — Power supply (+3V).
62 SYSM I Mute input. Active when high.
63 AVSS — Analog GND.
64 AVDD — Analog power supply (+3V).
65 AOUT-L O Left–channel analog output.
66 AIN-L I Left-channel operational amplifier input.
67 LOUT-L O Left-channel line output.
68 AVSS — Analog GND.
69 XVDD — Power supply for master clock.
70 XTAI I Crystal oscillation circuit input. Input the external master clock via the pin.
71 XTAO O Crystal oscillation circuit output.
72 XVSS — GND for master clock.
73 AVSS — Analog GND.
74 LOUT-R O Right-channel line output.
75 AIN-R I Right-channel operational amplifier input.
76 AOUT-R O Right-channel analog output.
77 AVDD — Analog power supply (+3V).
78 AVSS — Analog GND.
79
________
RST I System reset. Reset when low.
80 VDD — Power supply (+3V).
I/O Description Pin No. Pin Name