48
Pin No.
Pin Name
I/O
Description
123
124-126
127
128, 129
130
131
132-134
135
136-138
139
140-142
143
144
145, 146
147
148
149
150
151
152
153
154
155
166
157
158
159
160
VSS
SBD_12-10
VDD
SBD_9, 8
SCLK
VSS
SBA_9-7
VDD
SBA_6-4
VSS
SBA_3-1
VDD
SBA_0
SBA_10, 11
VSS
SCS1_N
SCS_N
SRAS_N
VDD
SCAS_N
SWE_N
SDQM
VSS
PLLVDD
NC
PLLVSS
VDD
NC
I
I/O
I
I/O
I/O
I
O
I
O
I
O
I
O
O
I
O
O
O
I
O
O
O
I
I
—
I
I
—
Ground.
SDRAM data bus 12-10.
Power (3.3V).
SDRAM data bus 9, 8.
SDRAM 81MHz clock.
Ground.
SDRAM address bus 9-7.
Power (3.3V).
SDRAM address bus 6-4.
Ground.
SDRAM address bus 3-1.
Power (3.3V).
SDRAM address bus 0.
SDRAM address bus 10, 11.
Ground.
Chip select for second DRAM.
Chip select for SDRAM.
SDRAM row address strobe.
Power (3.3V).
SDRAM column address strobe.
SDRAM write enable.
SDRAM control pin.
Ground.
Power-phase locked loop for SDRAM.
Not connected.
Phase locked-loop ground pin.
Power (3.3V).
Not connected.
All manuals and user guides at all-guides.com
Summary of Contents for XD-DV300
Page 11: ...12 11 BLOCK DIAGRAM All manuals and user guides at all guides com a l l g u i d e s c o m...
Page 14: ...18 17 SCHEMATIC DIAGRAM 1 MAIN SYSCON H All manuals and user guides at all guides com...
Page 23: ...36 35 SCHEMATIC DIAGRAM 7 PT AC120V 60HZ All manuals and user guides at all guides com...
Page 24: ...38 37 SCHEMATIC DIAGRAM 8 POWER All manuals and user guides at all guides com...
