– 35 –
ADJUSTMENT <TUNER / DECK / FRONT>
1. Clock Frequency Check
Settings :
• Test point : TP2 (CLK)
Method :
Set to MW 1602kHz and check that the test point is
2052kHz
±
45Hz.
2. MW VT Check
Settings :
• Test point : TP1 (VT)
Method :
Set to MW 1602kHz and check that the test point is
less than 8.0V. Then set to MW 531kHz and check
that the test point is more than 0.6V.
3. MW Tracking Adjustment
Settings :
• Test point : TP5 (Lch), TP6 (Rch)
• Adjustment location : L951 (1/3)
Method :
Set to MW 999kHz and adjust L951 (1/3) so that the
test point becomes maximum.
4. LW VT Adjustment
Settings :
• Test point : TP1 (VT)
• Adjustment location : L942
Method :
Set to LW 144kHz and adjust L942 so that the test
point becomes 1.3V
±
0.05V.
Then set to LW 290kHz and check that the test point
is less than 8.0V.
5. LW Tracking Adjustment
Settings :
• Test point : TP5 (Lch), TP6 (Rch)
• Adjustment location :
L941 ........................... 144kHz
TC942 ......................... 290kHz
Method :
Set up TC942 to center before adjustment. The level at
144kHz is adjusted to MAX by L941. Then the level
at 290kHz is adjusted to MAX by TC942.
6. AM IF Adjustment
Settings :
• Test point : TP5 (Lch), TP6 (Rch)
• Adjustment location :
L802 ........................... 450kHz
7. FM VT Check
Settings :
• Test point : TP1 (VT)
Method :
Set to FM 108.0MHz and check that the test
point is less than 8.0V. Then set to FM 87.5MHz and
check that the test point is more than 0.5V.
8. FM Tracking Check
Settings :
• Test point : TP5 (Lch), TP6 (Rch)
Method :
Set to FM 98.0MHz and check that the test point is
less than 13dB
µ
V.
9. DC Balance / Mono Distortion Adjustment
Settings :
• Test point : TP3, TP4 (DC balance)
: TP5(Lch), TP6(Rch) (Distortion)
• Adjustment location : L801
• Input level : 60dB
µ
V
Method :
Set to FM 98.0MHz and adjust L801 so that the
voltage between TP3 and TP4 is 0V
±
300mV with
minimum distortion.
< TUNER SECTION >
10. Tape Speed Adjustment (DECK 2)
Settings : • Test tape : TTA–100
• Test point : TP7(Lch), TP8(Rch)
• Adjustment location : SFR1
Method : Play back the test tape and adjust SFR1 so that the
frequency counter reads 3000Hz
±
5Hz (FWD) and
±
45Hz (REV) with respect to forward speed.
11. Head Azimuth Adjustment (DECK 1, DECK 2)
Settings : • Test tape : TTA–300
• Test point : TP7(Lch), TP8(Rch)
• Adjustment location : Head azimuth
adjustment screw
Method : Play back (FWD) the 10kHz signal of the test tape
and adjust screw so that the output becomes maximum.
Next, perform on REV PLAY mode.
12. PB Frequency Response Check (DECK 1, DECK 2)
Settings : • Test tape : TTA–300
• Test point :TP7(Lch), TP8(Rch)
Method : Play back the 315Hz and 10kHz signals of the test
tape and check that the output ratio of the 10kHz
signal with respect to that of the 315Hz signal is
0dB
±
3dB.
13. PB Sensitivity Adjustment (DECK 1, DECK 2)
Settings : • Test tape :
TTA–200 (400Hz)
• Test point :
TP7(Lch), TP8(Rch)
• Adjustment location : SFR301 (DECK 1, Lch)
SFR302 (DECK 1, Rch)
SFR303 (DECK 2, Lch)
SFR304 (DECK 2, Rch)
Method : Play back the test tape and adjust SFRS so that the
output level of the test points become 260mV
±
10mV
for DECK 1 and 245mV
±
10mV for DECK 2.
14. REC/PB Frequency Response Adjustment (DECK 2)
Settings : • Test tape : TTA–602
• Test point : TP7(Lch), TP8(Rch)
• Input signal : 1kHz / 10kHz (LINE IN)
• Adjustment location : SFR351 (Lch)
SFR352 (Rch)
Method : Apply a 1kHz signal and REC mode. Then adjust
OSC attenuator so that the output level at the TP7,
TP8 becomes 18mV. Record and play back the 1kHz
and 10kHz signals and adjust SFRs so that the output of
the 10kHz signals becomes 0dB
±
1dB with respect to
that of the 1kHz signal.
< DECK SECTION >
15. REC/PB Sensitivity Adjustment (DECK 2)
Settings : • Test tape :
TTA–602 (Normal)
• Test point :
TP7(Rch), TP8(Lch)
• Input signal :
1kHz (LINE IN)
• Adjustment location : SFR305 (Lch)
SFR306 (Rch)
Method : Apply a 1kHz signal and REC mode. Then adjust
OSC attenuator so that the output level at the test points
becomes 180mV. Record the play back the 1kHz signal
and adjust SFRs so that the output level becomes 0dB
±
0.5dB.
Summary of Contents for NSX-DP85
Page 14: ...SCHEMATIC DIAGRAM 1 MAIN 1 4 AMP SECTION VM 14...
Page 15: ...SCHEMATIC DIAGRAM 2 MAIN 2 4 TUNER SECTION 15...
Page 16: ...SCHEMATIC DIAGRAM 3 MAIN 3 4 DECK SECTION HEAD 1 HEAD 2 16...
Page 17: ...SCHEMATIC DIAGRAM 4 MAIN 4 4 PROLOGIC SECTION 17...
Page 20: ...SCHEMATIC DIAGRAM 5 FRONT CD KEY MIC DECK 20...
Page 22: ...SCHEMATIC DIAGRAM 6 AMP 1F 22...
Page 24: ...SCHEMATIC DIAGRAM 7 AMP PROLOGIC 24...
Page 26: ...SCHEMATIC DIAGRAM 8 PT 26...
Page 28: ...28 FL BJ750GNK 13G 35S GRID ASSIGNMENT ANODE CONNECTION GRID ASSIGNMENT...
Page 29: ...29 ANODE CONNECTION...
Page 30: ...30 IC BLOCK DIAGRAM...
Page 31: ...31...
Page 32: ...32...