
– 31 –
1
AVDD
-
Analog power supply for PLL (+5V).
2
PCO
-
PLL filter connection terminal.
3
AVSS
-
Analog ground.
4
M/S
I
Master / slave mode selection. (Not used)
5
DDIN
I
Digital audio interface data input. (Not used)
6
TEST
I
Test terminal (To be open). (Not used)
7
/IC
I
Initial clear input.
8
VSS
-
Ground.
9
XO
O
24.576MHz crystal oscillator connection output terminal.
10
XI
I
24.576MHz crystal oscillator connection input terminal.
11
MCK
O
12.288MHz clock output.
12
VDD
-
+5V power supply.
13
SDO
O
Serial data output.
14
SDBCK
I/O
Serial data bit clock input / output (64 fs).
15
SDWCK
I/O
Serial data word clock input / output (fs).
16
SDMCK
O
Serial data master clock output (256 fs or 128 fs).
17
VSS
-
Ground.
18
SYNC/U
O
Serial data synchronization timing output / User data output. (Not used)
19
FS128/C
O
Serial data master clock 128 fs output / Channel status output. (Not used)
20
DBL/V
O
Double rate output / Validity flag output.
21
ERR/BS
O
Data error detection output / Block start output. (Not used)
22
/LOCK
O
PLL lock detection output.
23
INT
O
Interrupt output.
24
VDD
-
+5V power supply.
25
/CS
I
Microcomputer interface chip select input.
26
SO
O
Microcomputer interface data output.
27
SI
I
Microcomputer interface data input.
28
SCK
I
Microcomputer interface bit clock input.
Pin No.
Pin Name
I/O
Description
IC, YSD917
Summary of Contents for AV-D57
Page 11: ... 11 SCHEMATIC DIAGRAM 1 MAIN 1 2 ...
Page 12: ... 12 SCHEMATIC DIAGRAM 2 MAIN 2 2 ...
Page 14: ... 14 SCHEMATIC DIAGRAM 3 FRONT ...
Page 16: ... 16 SCHEMATIC DIAGRAM 4 DIGITAL ...
Page 18: ... 18 SCHEMATIC DIAGRAM 5 VOLUME VIDEO ...
Page 20: ... 20 SCHEMATIC DIAGRAM 6 PT ...
Page 22: ... 22 SCHEMATIC DIAGRAM 7 TUNER ...
Page 23: ... 23 IC BLOCK DIAGRAM ...
Page 24: ... 24 ...
Page 25: ... 25 GRID ASSIGNMENT FL BJ759GK GRID ASSIGNMENT AND ANODE CONNECTION ...
Page 26: ... 26 ANODE CONNECTION ...