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Aewin Technologies SCB-9651, User Manual

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Aewin Technologies SCB-9651 User Manual Download Page 30

 

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  AEWI

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PCIE_S

 

PCIE_S

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WIN Technol

efine 

SSB_RXN0 

SSB_RXP0 

SSB_TXN0 

SSB_TXP0 

0M_VGA_DP

M_VGA_DN

_TF_PP2 

_TF_PN2 

ACBO 

DCDAT 

DCCLK 

ACGO 

ACRO 

SYNC 

SYNC 

SSB_RXN1 

SSB_RXP1 

SSB_TXN1 

SSB_TXP1 

SSB_RXN2 

SSB_RXP2 

SSB_TXN2 

SSB_TXP2 

SSB_RXN3 

SSB_RXP3 

SSB_TXN3 

SSB_TXP3 

 

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Define 

LAD0 

LAD1 

LAD2 

LAD3 

K_33M_IPM

LFRAME# 

CIE_RESET#

SB_TF_PP3

SB_TF_PN3

NCSI_RXD0

NCSI_RXD1

NCSI_CRS 

NCSI_TXD0

NCSI_TXD1

NCSI_TXEN

WAKE# 

RQ_SERIAL

CH_GP6_PU

CH_GP7_PU

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Summary of Contents for SCB-9651

Page 1: ...N 2 USB 2 S ogies Co L worki User V el Sandy Network Sy SATA HDD Ltd Cop ing A r s Ma Version 1 Bridge EP ystem 16 P 2 GbE CF pyright 201 Appl nual 2 Ivy Bridge PCIe x8 con 2 PCIe x8 3 All Righ ianc e EP Xeon E nectors for slot Redun hts Reserve ce E5 4600 Se expansion ndant PSU ed eries LAN ...

Page 2: ... 0 1 2 ogies Co L Reve n Fixed so Update Update Ltd Cop ersion H Mod First ome error i Operation R287 scree pyright 201 History ification t Release nformation System Su enshot pi 3 All Righ y pporting n define hts Reserve Ed Denny Denny ed itor y Huang y Huang ...

Page 3: ...manuf ducts desc OS 2 and PS ation Award Soft ntel altek A Technolog dows NT an Corporation mentioned and or regis have been stributor as ent or from SCB 9651 w free catalo Ltd Cop eserved informatio al may be r means with ended to be bility for any facturer res ribed in thi S 2 are reg tware Inter gies Inc nd MS DOS n herein are stered trade made to en ssume no li m the use of or other AE og plea...

Page 4: ...ation nformatio ng ions Layout ion 2 Conn 0 CB 965 onnector onnector onnector 3 Optio PMI card Ethernet m Ethernet m Ethernet m Front I O 4 BIOS etup g the CMO ptions ed Menu Mgmt y Exit ogies Co L eral Info n nector J 51 Connec Jumper L Jumper L Jumper L onal LAN with VGA module w module w module w Module S Setup OS Setup Ltd Cop ormatio Jumper ctor Jump Location a Location a Location a N Modu A ...

Page 5: ... 3 LAN Driv ppendix pendix A pendix B WIN Technol 5 Utilit on System Driver In ver Instal x Linux Cable D ogies Co L ty Dri m Suppor nstallation llation DOS Sam evelopme Ltd Cop iver Ins rting n mple code ent Kit pyright 201 stallatio 3 All Righ on hts Reserve ed ...

Page 6: ...00 latest LR DI hest speed m he SCB 965 FP Gigabit de 128 ports Support Q Bridge EP Intel Pa QPI up to AMI 64M Total 16 D DIMM per 1 ECC Re up to 1 2 LRDIMM DIMM ECC UDIM LR DIMM 1 One SO pyright 201 on dge EP Xeon rformance s th Interconn 4600 series p mory I O lat to 10 cores up to 8Gbp 1866 MHz a MM technolo mass storag 1 platform c copper with s Quad Intel P E5 4600 s tsburg C60 o 8GT s Mbit B...

Page 7: ... VGA optional 2U 1010W 4U rack m one 16x2 Four butt one Powe one HDD one Statu programm 430mm 16 9 W x Operating 20 75 pyright 201 t Ie x8 slot i e x8 connec e x SFP GbE x RJ45 Gb ntel 82580 x 10GbE S x 10GbE R module CN3530 TB SATA HDDs software RA pactFlashTM rnal USB 2 5 Console p port Intel port suppo pin header W ATX redu mount 2 LCM ons keypad er LED Gre LED Yellow us LED Gre mable GPIO W x ...

Page 8: ...ion modul developm O5204 00 C B9200 01 N C5200 00 E S200 00 K USB2B 00 U VGA01 00 V JDB91 00 R at the foll llation nce tains the r er is missin Ltd Cop 10 85 non cond gs ad Intel Sa work System D 2 GbE GA support e with 8 SF e with 8 RJ e with 2 SF e with 2 RJ ment kit Cross over Null modem Ethernet ca BMS cable USB cable VGA cable RJ 45 to DB lowing ite following g or dam pyright 201 relative h e...

Page 9: ... B 9651 in ou proper e or oth sily damag nti static p fore remo c packag rs or oth 1 applian Ltd Cop you purch bably ship goods ins ug the pow it appear n the orig rly ground er syste ge the SC packing u oving any ging To her unpa ce by its pyright 201 hased the p or store spect and wer adapt s damage ginal pack d yoursel m comp CB 9651 until you a y system ground ainted pa edges an 3 All Righ e S...

Page 10: ...1 F R 10 AEWI 6 Syst ront pane Rear pane Default WIN Technol tem La el feature el feature PSU is us ogies Co L ayout es s sing 2U A Ltd Cop ATX 1010W pyright 201 W 3 All Righ hts Reserve ed ...

Page 11: ...1 11 AEWI 7 Dime WIN Technol ension ogies Co L n Ltd Cop pyright 2013 All Righ hts Reserve ed ...

Page 12: ...s Jumpe tor FAN5 FAN6 1 0 ogies Co L nector J 51 Conne er Locati Smart FAN 4 Ltd Cop Jumper ctor Jum on De De N connector pin Smart FAN c ATX switc PCI Ex16 s pyright 201 r Config mper Loca fine efine r for Hot sw FAN Conne connector ch pin head slot x8 sign 3 All Righ guration ation and wappable FA ector er nal hts Reserve n Definitio AN ed on ...

Page 13: ...nol 8 0 N12 2 FAN5 FA ogies Co L AN7 FAN9 D G Speed Speed Spee Ltd Cop QPI P CPU0 S CPU1 S 12V CPU I 9 Smart F Define GND d Detect2 12V N A d Detect1 N A d Control pyright 201 PCI E BUS Smart FAN Smart FAN connector D Switch FAN conne 3 All Righ ector for Ho hts Reserve ot swappa ed able ...

Page 14: ...4 N 10 FAN WIN Technol FAN6 F n 1 2 3 4 connecto Pin 1 2 3 ogies Co L FAN8 FAN S r Ltd Cop N11 4 pin Define GND 12V peed Detec Control Defi GN 12 Speed D pyright 201 Smart FA ct ine D 2V Detect 3 All Righ AN Connect hts Reserve tor ed ...

Page 15: ...5 AEWI 1 ATX sw 9 10 CPU WIN Technol witch pin H Pin 1 2 U SMART F Pi 1 2 3 4 ogies Co L Header FAN n Ltd Cop pyright 201 Define GND PS_ON Defi GN 12 Speed D Cont 3 All Righ ine ND 2V Detect trol hts Reserve ed ...

Page 16: ... 2 2 16 AEWI W1 SW2 C 2 R284 Co WIN Technol CPU ID Pin B C A B onnector ogies Co L Jumper Ltd Cop S CPU0 CPU0 Location pyright 201 Setting 1 CB 965 1 CB 965 and Defi 3 All Righ 50 51 nition hts Reserve ed ...

Page 17: ...LD V 3 3V co ATX I2C CPU1 12V CPU0 12V 2V power c TX power co CPU0 1 QPI CPU2 3 QPI 12V outp 12V outp CPU2 12V CPU3 12V 12V outp 12V outp CPU3 PCI pyright 201 fine efine onnector ER connect E connecto E connecto BUS For R nnector For pin header V input 8P V input 8Pi connector onnector 24 I PCI E B I PCI E B put for CPU put for CPU V input 8Pi V input 8Pi put for CPU put for CPU E connecto 3 All R...

Page 18: ... FAN 1 2 SATA WIN Technol 37 connecto P A power co Pin 1 2 3 4 ogies Co L or Pin 1 2 3 onnector Ltd Cop CPU2 PCI pyright 201 E connecto De G Speed Defin 12 GND GND 5V 3 All Righ or efine GND 12V d Detect ne V D D V hts Reserve ed ...

Page 19: ...WIN Technol 2C pin hea Pin 1 2 3 4 5 26 27 44 D G G G G ogies Co L ader n 12V inp Define Ground Ground Ground Ground Ltd Cop put 8Pin pyright 201 P Pin 5 6 7 8 3 All Righ Define SMBCLK SMBDATA PCH_GP31 N A N A De hts Reserve efine 12V 12V 12V 12V ed ...

Page 20: ...umpe ctor 1 2 1 5 6 7 8 9 10 11 ogies Co L or Jumpe er Locati Ltd Cop er Locat on De Def FAN co 5V 3 3V SATA co DMI C JTA GPO pin SPI prog VGA pin LPC pin pyright 201 tion and fine fine nnector power inpu onnector CPLD BUS TAG n header gramming n header Header 3 All Righ Definitio ut hts Reserve on ed ...

Page 21: ...a or Ltd Cop RESET p Case open GPI pin COM2 bo Keypad p LCM pin PS2 KB MS LAN RJ45 c USB1 2 c COM1 RJ45 Clear Watchdog ATX Switc IPMI co CF con pyright 201 in header pin header header ox header pin header n header S pin heade connector connector 5 connector CMOS g function ch function onnector nnector De G Speed 3 All Righ r r 2port r efine ND 12V d Detect hts Reserve ed ...

Page 22: ... WIN Technol A connecto Defi TCK TDO TM N A TD ogies Co L or pin 1 2 3 4 5 6 7 ne K O S A I Ltd Cop Defi Grou TX TXN Grou RXN RX Grou Pin 2 4 6 8 10 pyright 201 ne und P N und N P und Defi GN 3 3V N N GN 3 All Righ ine D VAUX A A D hts Reserve ed ...

Page 23: ...nol n header G G G G ogrammin ogies Co L Define GPIO20 GPIO21 GPIO22 GPIO23 GND g Defin 3 3 CS MISO N A Ltd Cop P ne 3V O A pyright 201 Pin De 2 3 4 3 6 3 8 3 10 Pin 2 4 6 8 3 All Righ efine 3V_PU 3V_PU 3V_PU 3V_PU 3 3V Defi Grou SCL MOS IO hts Reserve ine und LK SI O ed ...

Page 24: ...header n 1 3 5 7 9 1 ogies Co L r Define RED BLUE GND GND 5V N A HSYNC SCL Defi 3 AD AD PCIRS CLO Grou Ltd Cop ine 3V 1 3 ST CK und pyright 201 Pin 2 4 6 8 10 12 14 16 Pin D 2 A 4 A 6 Fr 8 10 12 G 3 All Righ Define AD 0 AD 2 rame 5V N A round hts Reserve Define GREEN N A GND GND GND SDA VSYNC N A ed ...

Page 25: ...WI 12 Reset 13 Case o 14 GPI p Pin WIN Technol t pin heade Pin 1 2 open pin h Pin 1 2 in header ogies Co L er n header Ltd Cop Define pyright 201 Def Grou Caseo 3 All Righ Define Ground Reset fine nd open hts Reserve ed ...

Page 26: ...Technol 2 box head D D R T D G ad pin hea Pin 1 2 3 4 5 ogies Co L der Define DCD RXD TXD DTR round ader Ltd Cop GPI0 GPI1 GPI2 GPI3 GND Pin De 6 7 R 8 C 9 R 10 N pyright 201 efine DSR RTS TS RI 2 N A Defin ACK BUSY PE SLCT Groun 3 All Righ e Y T d hts Reserve ed ...

Page 27: ...chnol pin header Def 5 AFD INI PD PD PD PD BL KB MS pin D K ogies Co L r fine 5V D T D1 D3 D5 D7 LN header Define KCLK KDAT N A Ltd Cop Pin 2 4 6 8 10 12 14 16 Pin 2 4 6 pyright 201 D G Define MCLK MDAT N A 3 All Righ Define Ground N A SLIN PD0 PD2 PD4 PD6 BLP hts Reserve ed ...

Page 28: ...y Bi Color 0 Mbps 00 Mbps 000Mbps 20 21 US WIN Technol PS PS LAN RJ45 Define MDI0 MDI0 MDI1 MDI2 MDI2 MDI1 MDI3 MDI3 vity LED Green Blinking Speed LED Off Yellow Green SB connect ogies Co L S2_GND S2_VCC connector D tor Ltd Cop 8 10 r 2port pyright 201 PS2_GND PS2_VCC 3 All Righ D C hts Reserve ed ...

Page 29: ...COM1 Pin 1 2 3 4 5 6 7 8 MM1 IPM WIN Technol 1 RJ45 con I connect ogies Co L Defin 5V_US USBDT USBDT0 Groun nnector Define CTS _RT DTR TXD GND GND RXD DSR CTS _RT or Ltd Cop ne SB T0 0 nd e TS TS pyright 2013 All Righ hts Reserve ed ...

Page 30: ...DP M_VGA_DN _TF_PP2 _TF_PN2 ACBO DCDAT DCCLK ACGO ACRO SYNC SYNC SSB_RXN1 SSB_RXP1 SSB_TXN1 SSB_TXP1 SSB_RXN2 SSB_RXP2 SSB_TXN2 SSB_TXP2 SSB_RXN3 SSB_RXP3 SSB_TXN3 SSB_TXP3 ogies Co L Pin 4 6 16 18 P 22 CL N 24 30 PC 34 U 36 U 40 N 42 N 46 N 50 N 52 N 56 N 164 166 IR 174 PC 176 PC 180 P 182 192 PC 194 PC Ltd Cop Define LAD0 LAD1 LAD2 LAD3 K_33M_IPM LFRAME CIE_RESET SB_TF_PP3 SB_TF_PN3 NCSI_RXD0 NC...

Page 31: ...7 12 168 172 1 CMOS Pin B A B C dog functi Pin B A B C with functi ogies Co L 81 82 87 8 06 111 112 19 20 25 2 28 133 134 173 178 179 on on Ltd Cop 88 93 94 99 2 117 118 1 26 31 32 37 4 138 139 9 184 185 pyright 201 9 100 123 124 7 38 43 44 144 145 15 189 190 19 Set Normal Clear L Res 3 All Righ 48 49 54 5 50 151 155 95 196 tting Default r CMOS Setting AN Bypass set Default hts Reserve 55 60 61 6 ...

Page 32: ...echnol Pin B A B C Connecto s Jumpe PI pin head OM3 pin he n header Defin GND TXD RXD pin header ogies Co L or Jumpe er Locati Define der for Deb eader ne D r for Debu Ltd Cop er Locat on De bug ug pyright 201 S Auto By p tion and fine 3 All Righ Setting o power on ower butto Definitio hts Reserve n on on ed ...

Page 33: ...e Pi 3 3 2 CS 4 ISO 6 N A 8 r 3 Opt 51 can of rious app IPMI car ogies Co L n Defin 2 Groun 4 SCLK 6 MOSI 8 IO tional ffer variou plications rd with V Ltd Cop ne nd K I Lan Mo us GbE an and mar VGA supp pyright 201 odule nd 10GbE ket dema port 3 All Righ Add module c and hts Reserve on Ca combinati ed ard ons ...

Page 34: ...et ght GbE fibe CN8 CN9 CN N36 propr ogies Co L t module er module N10 CN3 C rietary conn Ltd Cop e with eig The FCI Ai N4 CN5 CN nector of th pyright 201 ght GbE rmax conn N6 CN31 CN he middle p 3 All Righ SFP ector must N33 CN35 C plane R284 hts Reserve be connec CN37 CN30 4A ed cted 0 ...

Page 35: ... t module pper module N10 CN3 C rietary conn t module FP module CN4 CN5 C ector of the Ltd Cop e with eig e The FCI A N4 CN5 CN nector of th e with tw e The FCI A N6 CN31 C e middle pla pyright 201 ght GbE Airmax con N6 CN31 CN he middle p wo 10GbE Airmax mu CN33 CN35 ane R284A 3 All Righ Copper nector mus N33 CN35 C plane R284 E SFP st be conne CN37 CN3 A hts Reserve st be conne CN37 CN30 4A ecte...

Page 36: ...n nnected w 4A DD Status Ds ogies Co L O modu module w onsole po ne VGA p with CN11 Dual Ltd Cop ule with Powe ort COM1 in header 1 propriet USB 2 0 pyright 201 er HDD S RS 232 r for Optio tary conn Co LOM 3 All Righ tatus LED two Gb on The F ector of t onsole Por M hts Reserve Ds Dual U bE port a FCI Airma the middl rt RJ45 Gb Port ed USB nd ax e bE ...

Page 37: ...c e of display mber and ty aintained by emory in C e system BI he battery o Ltd Cop tup oard is co AMI BIOS give the s computer of program ograms tha It conta the system no disk base city of the a y adapter in ype of disk y battery in CMOS can b IOS also su of the batte pyright 201 onfigured w The BIOS ystem its and determ s at provide t ins a set of when you t ed setup p appliance nstalled drives...

Page 38: ...ust fter you or code at s isk drive after not h setup miss ery erent type o sh program program a how to use etup progr ot the syste s the follow ter SETUP key to ente Ltd Cop gure the sy Defaults f IOS Feature from the m ard disk ty ave and Ex up Utility dify the syst tomize you startup having used sing of CPU m to update fter you tu e the progra ram s mai em After t wing messa er BIOS set pyright...

Page 39: ...Di age Chang Day mm d s you to set hour min s you to set s F4 Save mized Defa essing ESC Ltd Cop row keys an f each setu ays the BIO splays the ge the lang dd yyyy t the system sec t the system and Exit ults to lo C anywhe pyright 201 nd press E p option OS related total memo guage displa m date m time to save you ad the Opt ere in the pr 3 All Righ Enter Se information ory size ay in BIOS ur chan...

Page 40: ...or chang nging the s setting Use For selectin ogies Co L ns of the BIOS s of this ch basic system g the advan the Intel ch ing the Ser system boo er and Sup ng the exit Ltd Cop S setup pro hapter m configura nced system hipset funct rver Mgmt ot configura ervisor Pas options an pyright 201 ogram are d ations m settings tion settings ations sswords d loading d 3 All Righ described i default sett ht...

Page 41: ...setup ogies Co L u items allo m devices etup optio rom the ma o move betw Some fie ed with the menu or p Ltd Cop ow you to s n as follow ain menu ween fields elds let you Advanced s press F4 pyright 201 o change ws The follow Modify t u enter num setup pres key to sav 3 All Righ the settin wing screen he selected meric values s the ve setting hts Reserve ngs for th appears d field using s directly...

Page 42: ...System Su yload Payload of ead Reque Read Requ ue Links ve power s Disable Lin ogies Co L em Settin it capable upports 64 f PCI Expre st uest Size o software wi k Ltd Cop ngs Devices to bit PCI Dec ess Device f PCI Expre ll disable u pyright 201 o be Decod coding or allow S ess Device unpopulated 3 All Righ ded in Abov ystem BIO or allow S d PCI Expre hts Reserve ve 4G Add S to select System BIO e...

Page 43: ...EN2 Dev at support fy the Comp oftware wi elected so e and set t ber field b nto a Type0 n ARI Devi nable re and set ter Enable Ltd Cop gs s vice Regi Completio pletion Time ll use sho oftware will to Enabled being 0 en 0 Configura ce immedia to Enable bit is in the pyright 201 ister Sett n Timeout eout value orter timeo use longer d the Dow nforcement ation Requ ately below ed this fu e Command 3...

Page 44: ...d e and set to bit Attrib e e and set to bit Attrib e e and set to sm ocking e and set to TLP Prefixe GEN2 Lin e and set to k operation nt in its tra ed ment re and set wer manage rm factor s e and set t sequences w Ltd Cop to Enabled o Enabled ute 2 req o Enabled ute 2 req o Enabled o Enabled es nk Registe o Force to 2 nal speed by aining sequ t to Enable ement of L specification to Enabled when ...

Page 45: ...widt operation utonomous by hardwar nge link s stable link o U Config ogies Co L s Width re and set th except w s Speed re and set speed exce operation uration Ltd Cop to Disable width size re to Disable ept speed pyright 201 ed this w eduction for ed this w rate reduc 3 All Righ ill disable t r the purpos ill disable t ction for th hts Reserve the hardwa se of correc the hardwa he purpose ed are ...

Page 46: ...ximum Windows XP able Bit nt certain cl ing OS Win prise 3 Upda efetcher d Level Cac che Line P ogies Co L and Linux OS OS no thread per s le in each p m asses of m ndows Serv ate 3 che L2 str refetch Ltd Cop OS optimiz ot optimized enabled co processor p alicious buf ver 2003 SP reamer pref pyright 201 zed for Hyp d for Hype ore is enabl package ffer overflo P1 Window fetcher 3 All Righ per Threa...

Page 47: ...next L etcher ch of next L zation Tec a VMM ca chnology Power M nology wer manag ogies Co L che L2 pre her L1 Data line L1 line base chnology an utilize th Manageme ement feat Ltd Cop efetching o e based upo ed upon seq he addition ent Confi tures pyright 201 f adjacent on multiple quential loa al hardwar iguration 3 All Righ cache lines loads in sa ad history e capabiliti hts Reserve s ame cache ...

Page 48: ...fo timize betw rrides this 4 4 SATA WIN Technol e Intel Spee e Intel Turb ordination TE Coordin ort e CPU C3 A rt e CPU C6 A tate limit te limit ormance ween perfor value acco A Configu ogies Co L edStep bo Mode ation type ACPI C2 re ACPI C3 re rmance and rding to its uration Ltd Cop eport to OS eport to OS d power sav s power pla pyright 201 ving Wind n 3 All Righ ows 2008 a hts Reserve and later...

Page 49: ... configura tem WIN Technol 2 AHCI M Port0 5 able It will ogies Co L Mode 3 R This infor show No Ltd Cop RAID Mode rmation is ot Present pyright 201 auto detec if no IDE 3 All Righ cted by BIO device is i hts Reserve OS and is installed in ed not the ...

Page 50: ... port 60h 6 keyboard l r time out value for Co time out rage device ogies Co L port AUTO o E option w OSes witho d by XHCI 4h emulat legacy supp ontrol Bulk e Start Unit Ltd Cop option disa will keep U out XHCI ha driver ion suppor port for non k and Inte t command pyright 201 bles legacy USB device and off sup rt This sh n USB awa rrupt transf time out 3 All Righ support if n es available port Th...

Page 51: ...93 Mod Switch this f WIN Technol r up delay e the devic to uses def from Hub d orm Fun h dog func Mode de Sec M imer de Sec M e for COM2 de function ne ogies Co L y ce will take fault value descriptor ction ction in in or SOL eed save an Ltd Cop e before it for a Root nd reboot pyright 201 t properly t port it is 1 3 All Righ reports itse 100 ms for hts Reserve elf to the a Hub port ed Host t the ...

Page 52: ...CPU CN3 52 AEWI U0 and CP 3 to CN10 WIN Technol PU1 Hardw Fans Spe ogies Co L ware Monit ed Ltd Cop tor pyright 2013 All Righ hts Reserve ed ...

Page 53: ...CPU 53 AEWI U2 and CP WIN Technol PU3 Hardw ogies Co L ware Monit Ltd Cop tor pyright 2013 All Righ hts Reserve ed ...

Page 54: ...3 4 5 2 LAN B s item allo wer off on WIN Technol 7 Fans Sp Bypass fun ows you to CPU0 or ogies Co L eed nction o enable d CPU1 CP Ltd Cop disable the PU2 CPU pyright 201 e LAN Bypa 3 3 All Righ ass1 or 2 w hts Reserve when syst ed tem ...

Page 55: ...55 AEWI WIN Technologies Co L Ltd Cop pyright 2013 All Righ hts Reserve ed ...

Page 56: ...4 4 56 AEWI 4 6 Super I WIN Technol IO Configu ogies Co L uration Ltd Cop pyright 2013 All Righ hts Reserve ed ...

Page 57: ...isa ange Setti ect an optim Health Sta s screen WIN Technol al Port 0 able Serial P ngs mal setting atus shows the ogies Co L 1 Config Port COM for Super e mother Ltd Cop guration IO device board vol pyright 201 tage and 3 All Righ system t hts Reserve temperatu ed ure ...

Page 58: ...4 4 58 AEWI 4 6 2 Cons WIN Technol sole Redi ogies Co L irection S Ltd Cop Settings pyright 201 COM0 3 All Righ hts Reserve ed ...

Page 59: ...Con Con 59 AEWI nsole Redi nsole Redire WIN Technol irection ection Enab ogies Co L ble or Disab Ltd Cop ble pyright 2013 All Righ hts Reserve ed ...

Page 60: ... Parity a bit ogies Co L ded ASCII t color func 1 or more mission spe may requir ith the data of 1 s in the d Mark p y do not allo Ltd Cop I char set ction keys bytes eed The sp re lower spe a bits to det e data bits arity bit is ow for erro pyright 201 VT100 A etc VT UTF peed must eeds tect some t is even Od always 1 S or detection 3 All Righ ASCII char F8 Uses UT be matche transmissio dd parity ...

Page 61: ... Co L end of a s d setting is 1 stop bit data loss f a stop sig rt signal c o send start upport ation Key S only text w nded termin Resolutio ber of Rows KeyPad on P S POST BootLoader o Legacy O tion is enab Ltd Cop serial data s 1 stop bit from buffer gnal can be can be sent t stop signa upport for ill be sent nal resoluti on s and Colum Putty is selected OS Default bled for Leg pyright 201 packe...

Page 62: ...d pace Parity ogies Co L n ded ASCII t color func 1 or more mission spe may requir ith the data of 1 s in the d Mark p y do not allo Ltd Cop I char set ction keys bytes eed The sp re lower spe a bits to det e data bits arity bit is ow for erro pyright 201 VT100 A etc VT UTF peed must eeds tect some t is even Od always 1 S or detection 3 All Righ ASCII char F8 Uses UT be matche transmissio dd parit...

Page 63: ...direct ogies Co L end of a s d setting is 1 stop bit data loss f a stop sig rt signal c o send start upport ation Key S only text w nded termin Resolutio ber of Rows KeyPad on P S POST BootLoader o Legacy O tion is enab Ltd Cop serial data s 1 stop bit from buffer gnal can be can be sent t stop signa upport for ill be sent nal resoluti on s and Colum Putty is selected OS Default bled for Leg pyrig...

Page 64: ...4 5 4 5 64 AEWI 5 Chip 1 North B WIN Technol pset Bridge IO ogies Co L OH Config Ltd Cop uration pyright 2013 All Righ hts Reserve ed ...

Page 65: ... M mory Mod ect the mod WIN Technol y RID Compatibi BIOS spec e de for mem BWLIMIT WLIMIT In DFX devi DFX devices MODE ODES Disa e de for mem ogies Co L lity Revisi mory initializ ntel Recom ces s can be hid abled MOD mory initializ Ltd Cop on ID C zation mmended va dden or un E0 MODE1 zation pyright 201 CRID Fun alues hidden 3 All Righ ctionality hts Reserve mentioned ed d in ...

Page 66: ...Disable nk Margin able Disable WIN Technol BWLIMIT WLIMIT In MODE ODES Disa able Non un rt ble MPST S nabled and eed erleaving nt Channel aving nt rank Inte e Patrol Scr ub e Demand S bling e Data Scra ng e Device Ta e Rank Mar ogies Co L ntel Recom abled MOD niform Mem Support Alo Channel In Interleavin erleaving se rub Scrubing Fe ambling agging rgin Ltd Cop mmended va E0 MODE1 mory Access ong w...

Page 67: ...itude abov mation shows th Bridge I T d ble Intel Support ble VT d ogies Co L mal Throttli is is a perce ve the sea l e memor Intel R V R Virtua t Engine C Ltd Cop ing OLTT entage of t level in met ry informa VT for Dire alization T Coherency pyright 201 Open Loop the peak ba ters ation ected I O Technolog y support 3 All Righ p Thermal T andwidth al Configura gy for Dire hts Reserve Throttling ll...

Page 68: ...s Direct C zation WA en3 Equaliz ptimization tion require that this o ogies Co L Engine A Advance I O Accele Cache Acce s zation Work n es that No option is lef Ltd Cop Address Tr ed Intel P eration Tec ess Support karounds m Snoop in P ft at default pyright 201 ranslation PCI I O C hnology I t mentioned in PCI Express t VC1 3 All Righ n Services Configurat OAT n SNB_BSU s Settings is hts Reserve ...

Page 69: ...t number MCFG BASE CFG BASE hance IO M hance IO Mo WIN Technol r of 1GB con E Values Mode Supp ode Suppor ogies Co L ntiguous re port rt for PCIe Ltd Cop egions to be e pyright 201 e assigned f 3 All Righ for MMIOH hts Reserve space per C ed CPU ...

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Page 71: ...71 AEWI WIN Technologies Co L Ltd Cop pyright 2013 All Righ hts Reserve ed ...

Page 72: ...72 AEWI WIN Technologies Co L Ltd Cop pyright 2013 All Righ hts Reserve ed ...

Page 73: ...4 5 73 AEWI 5 4 Chipse WIN Technol et South ogies Co L Bridge Ltd Cop pyright 2013 All Righ hts Reserve ed ...

Page 74: ...tate to go ertion Stre bled SLP_S4 ertion Widt mum assert TA RAID O her to enab on Timer bled the Hig pset Sout ogies Co L Controller s o to when tch Enable 4 Assertio th ion width o prom Driv ble the onbo gh Precision th Bridge Ltd Cop power is r e on Stretch of the SLP_ ver oard SATA n Event Tim e PCI Ex pyright 201 re applied a S4 signal Option ROM mer xpress Po 3 All Righ after a pow M or EFI ...

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Page 76: ...EHC Ena USB Ena 76 AEWI CI Control abled Disab B Port 0 1 abled Disab WIN Technol ller bled USB 2 2 3 bled All USB ogies Co L 0 EHCI S B Devices Ltd Cop Support pyright 2013 All Righ hts Reserve ed ...

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