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Advantech SOM-2532 Series, User Manual

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Advantech SOM-2532 Series User Manual Download Page 58

SOM-2532 User Manual

48

–

PCI Express Root Port 4

Figure 3.30 PCI Express Root Port 4

–

PCI Express Root Port 4

Control the PCI Express Root Port. AUTO: To disable unused root port auto

-

matically for the most optimum power savings. Enable: Enable PCIe root port 

Disable: Disable PCIe root port

–

ASPM.

PCI Express Active State Power Management settings

–

Hot Plug

PCI Express hot plug enable/disable

–

PCIe Speed

Configure PCIe Speed

Summary of Contents for SOM-2532 Series

Page 1: ...User Manual SOM 2532...

Page 2: ...umes no liability under the terms of this warranty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most customers never need to use our repai...

Page 3: ...use harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one or more of the fo...

Page 4: ...t your dealer immediately SOM 2532 module 1 x Heatspreader 1960093586N000 Warning Warnings indicate conditions which if not observed can cause personal injury Caution Cautions are included to help pre...

Page 5: ...liquid into an opening This may cause fire or electrical shock 13 Never open the equipment For safety reasons the equipment should be opened only by qualified service personnel 14 If any of the follo...

Page 6: ...avoid electrical shock always disconnect the power from the PC chassis before manual handling Do not touch any components on the CPU card or other cards while the PC is powered on Disconnect the powe...

Page 7: ...nformation 11 2 1 Board Information 12 Figure 2 1 Atom _QVXE Board Chip Front 12 Figure 2 2 Atom _QVXE Board Chip Rear 12 2 2 Mechanical Drawing 13 Figure 2 3 Atom Series Board Mechanical Diagram Fron...

Page 8: ...raphics Configuration 41 Figure 3 24LCD Control 42 Figure 3 25PCH IO Configuration 43 Figure 3 26PCI Express Configuration 44 Figure 3 27PCI Express Root Port 1 45 Figure 3 28PCI Express Root Port 2 4...

Page 9: ...5 Appendix A Pin Assignment 77 A 1 SOM 2532 Pin Assignment 78 Appendix B Watchdog Timer 87 B 1 Programming the Watchdog Timer 88 Appendix C System Assignments 89 C 1 System I O Ports 90 Table C 1 Syst...

Page 10: ...SOM 2532 User Manual x...

Page 11: ...Chapter 1 1 General Information This chapter details background information on the SOM 2532 CPU Computer on Module Sections include Introduction Functional Block Diagram Product Specification...

Page 12: ...age and temperature monitoring ther mal protection and mitigation through processor throttling LCD backlight on off and brightness control and embedded storage for customized information When com bine...

Page 13: ...echnology an IBM trademark term used to refer to Intel based personal computer in 1990s PEG PCI Express Graphics RTC Real Time Clock battery backed circuit in PC AT systems that keeps system time and...

Page 14: ...on module 0 N A 1 LVDS LCD eDP MIPI DSI 1 1 1 1 1 1 HDMI DP 0 1 1 1 DP 0 1 1 MIPI CSI 0 2 0 SDIO 0 1 1 SPI 0 2 1 I2S 0 1 1 Audio HDA I2S2 0 1 1 SMBus 0 1 1 I2C 2 6 2 Serial Port 2 4 4 CAN Bus 0 2 2 US...

Page 15: ...for more details 1 3 7 ESPI 2 x eSPI to Carrier Board ESPI_CS0 ESPI_CS1 1 x eSPI to EC 1 3 8 Serial Bus 1 3 8 1 SMBus Support SMBus 2 0 specification 1 3 8 2 I2C Bus Supports I2C bus 7 bit and 10 bit...

Page 16: ...ster SPI operation only SPI clock can be 50MHz 33MHz or 20MHz capacity up to 16MB 1 3 9 9 CAN Bus Supports 2 x CAN FD bus interfaces 1 3 9 10 eMMC v5 1 HS400 DDR Mode Supports transfer the data in 8 b...

Page 17: ...5 or 2 stop bit selectable 1 3 9 18 BIOS The BIOS chip is on module by default This allows the user to place BIOS chip on carrier board with appropriate design and a pull down to GND on BIOS_DISABLE p...

Page 18: ...and may need customized BIOS 1 3 10 5 Advantech S5 ECO Mode Deep Sleep Mode Advantech iManager provides additional features that allow the system to enter a very low suspend power mode S5 ECO mode In...

Page 19: ...er to provide backwards compatibility 1 3 15 Power Consumption Hardware Configurations 1 MB SOM 2532DCBC U0A1 2 DRAM 16GB DDR4 3200MHz 3 Carrier board SOM DB2500 00A1 Test Condition 1 Test temperature...

Page 20: ...2 0GHz 3 0GHz 500MHz 750MHz 12W 16GB N A Yes Passive 0 60 C SOM 2532CCBC U0A1 Atom x6425E 4 32EU 2 0GHz 3 0GHz 500MHz 750MHz 12W 8GB 32GB Yes Passive 0 60 C SOM 2532CCBC S5A1 Atom x6413E 4 16EU 1 5GH...

Page 21: ...Chapter 2 2 Mechanical Information This chapter details mechanical information on the SOM 2532 CPU Computer on Module Sections include Board Information Mechanical Drawing Assembly Drawing...

Page 22: ...on SOM 2532 Computer on Module Please be aware on these positions while designing carrier boards to avoid mechani cal issues and to choose thermal solutions that provide the best thermal dissipation p...

Page 23: ...wing For more details on 2D 3D models please look on Advantech s COM support service website http com advantech com Figure 2 3 Atom Series Board Mechanical Diagram Front Figure 2 4 Atom Series Board M...

Page 24: ...Manual 14 Figure 2 6 Celeron_Pentium_J_N Series Board Mechanical Diagram Front Figure 2 7 Celeron_Pentium_J_N Series Board Mechanical Diagram Rear Figure 2 8 Celeron_Pentium_J_N Series Board Mechanica...

Page 25: ...r Manual Chapter 2 Mechanical Information 2 3 Assembly Drawing These figures demonstrate the assembly order of the thermal module in particular the COM module to carrier board Figure 2 9 Atom Series A...

Page 26: ...SOM 2532 User Manual 16 Figure 2 10 Celeron_Pentium_J_N Series Board Assembly Diagram There are 4 x reserved screw holes for SOM 2532 These are used to attach the heat spreader...

Page 27: ...n Please consider the CPU and chip height tolerance when designing your thermal solution Intel Atom Processor Series Figure 2 11 Main Chip Height and Tolerance Intel Pentium and Celeron N and J Series...

Page 28: ...SOM 2532 User Manual 18...

Page 29: ...Chapter 3 3 AMI BIOS This chapter details BIOS setup information for the SOM 2532 CPU computer on module Sections include Introduction Entering Setup Hot Operation Key Exit BIOS Setup Utility...

Page 30: ...This chapter describes the basic navigation of the BIOS Setup Utility Figure 3 1 Setup Program Initial Screen AMI s BIOS ROM has a built in Setup program that allows users to modify the basic system...

Page 31: ...the options that can be configured Grayed out options cannot be configured options in blue can The right frame displays the key legend Above the key legend is an area reserved for a text message When...

Page 32: ...dvanced BIOS Setup screens are shown below The sub menus are described on the following pages Figure 3 3 Advanced BIOS Features Setup Screen CPU Configuration CPU Configuration Parameters PCH FW Confi...

Page 33: ...cessor Speed Intel VMX Virtualization Technology When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology Active Processor Cores Number of cores to enable...

Page 34: ...State When Disabled ME will be put into ME Temporarily Disabled Mode ME Unconfig on RTC Clear When Disabled ME will nor unconfigured on RTC clear Firmware Update Configuration Configure Management Eng...

Page 35: ...Manual Chapter 3 AMI BIOS 3 2 2 3 Firmware Update Configuration Figure 3 6 Firmware Update Configuration ME FW Image Re Flash Enable Disable Me FW Image Re Flash function FW Update Enable Disable Me F...

Page 36: ...nt Allows CPU to go to C states when it s not 100 utilized Inte Speed Shift Technology Enable Disable Intel speed shift technology support Enabling will expose the CPPC v2 interface to allow for hardw...

Page 37: ...adeoff between power and IO latency PCH TSN GBE Multi Vc Enable Disable TSN Multi Virtual Channels PSE TSN GBE 0 Multi Vc Enable Disable TSN Multi Virtual Channels TSN GBE must not be host owned PSE T...

Page 38: ...ank SHA256 PCR Bank Enable or disable SHA256 PCR Bank Pending Operation Schedule an operation for the security device Note Your computer will reboot during restart in order to change state of security...

Page 39: ...upport to TPM2 0 devices Auto will support both with the default set to TPM2 0 devices if not found TPM1 2 devices will enumerated 3 2 2 6 ACPI Settings Figure 3 10 ACPI Settings Enable ACPI Auto Conf...

Page 40: ...on Get value from EC and only set value when Save Changes Backlight Enable Polarity Switch Backlight Enable Polarity for Native or Invert Brightness PWM Polarity Backlight Control Brightness PWM Polar...

Page 41: ...rt 1 Configuration Figure 3 12 Serial Port 1 Configuration Serial Port Enable or Disable Serial Port COM Device Settings Set Parameters of Serial Port 1 COMA Change Settings Select an optimal settings...

Page 42: ...guration Figure 3 13 Serial Port 2 Configuration Serial Port Enable or Disable Serial Port COM Device Settings Set Parameters of Serial Port 2 COMB Change Settings Select an optimal settings for Super...

Page 43: ...33 SOM 2532 User Manual Chapter 3 AMI BIOS 3 2 2 10 Hardware Monitor Figure 3 14 Hardware Monitor 3 2 2 11 Serial Port Console Redirection Figure 3 15 Serial Port Console Redirection...

Page 44: ...able Console Redirection Settings The settings specify how the host computer and the remote computer which the user is using will exchange data Both computers should have the same or compatible settin...

Page 45: ...hange should be claimed by XHCI driver USB mass storage driver support Enable Disable USB Mass Storage Driver Support USB transfer time out The time out value for Control Bulk and Interrupt transfers...

Page 46: ...If disabled IPv4 HTTP boot support will not be available IPv6 PXE Support Enable Disable IPv6 PXE boot support If disabled IPv6 PXE boot support will not be available IPv6 HTTP Support Enable Disable...

Page 47: ...SDIO Configuration Figure 3 18 SDIO Configuration SDIO Access Mode Auto Option Access SD device in DMA mode if the controller supports it other wise in PIO mode DMA Option Access SD device in DMA mode...

Page 48: ...r Manual 38 3 2 2 15 SMARC GPIO Configuration Figure 3 19 Network Stack Configuration GPIO0 SMARC GPIO0 GPIO1 SMARC GPIO1 GPIO2 SMARC GPIO2 GPIO3 SMARC GPIO3 GPIO4 SMARC GPIO4 GPIO5 SMARC GPIO5 GPIO6...

Page 49: ...BIOS Setup screen You can display a chipset BIOS setup option by highlighting it using the Arrow keys All Plug and Play BIOS setup options are described in this section The Plug and Play BIOS Setup s...

Page 50: ...re 3 21 System Agent SA Configuration Memory Configuration Memory Configuration Parameters VT d VT d capability Above 4GB MMIO BIOS assignment Enable Disable above 4GB memory mapped IO BIOS assignment...

Page 51: ...figuration Figure 3 22 Memory Configuration Max TOLUD Maximum value of TOLUD Dynamic assignment would adjust TOLUD auto matically based on the largest MMIO length of installed graphic controller Graph...

Page 52: ...d Graphics Memory size is used by the internal graphics device DVMT Total Gfx Mem Select DVMT5 0 total graphic memory size is used by the internal graphic device LCD Control Figure 3 24 LCD Control NX...

Page 53: ...nel scaling option used by the internal graphic device Panel color depth Select the LFP panel color depth 3 2 3 2 PCH IO Configuration Figure 3 25 PCH IO Configuration PCI Express Configuration PCI Ex...

Page 54: ...wer savings Enable Enable PCIe root port Disable Disable PCIe root port PCI Express Root Port 2 Control the PCI Express Root Port AUTO To disable unused root port auto matically for the most optimum p...

Page 55: ...Port 1 PCI Express Root Port 1 Control the PCI Express Root Port AUTO To disable unused root port auto matically for the most optimum power savings Enable Enable PCIe root port Disable Disable PCIe ro...

Page 56: ...ontrol the PCI Express Root Port AUTO To disable unused root port auto matically for the most optimum power savings Enable Enable PCIe root port Disable Disable PCIe root port ASPM PCI Express Active...

Page 57: ...t Port 3 Control the PCI Express Root Port AUTO To disable unused root port auto matically for the most optimum power savings Enable Enable PCIe root port Disable Disable PCIe root port ASPM PCI Expre...

Page 58: ...ontrol the PCI Express Root Port AUTO To disable unused root port auto matically for the most optimum power savings Enable Enable PCIe root port Disable Disable PCIe root port ASPM PCI Express Active...

Page 59: ...ation Figure 3 31 SATA Configuration SATA Controller s Enable Disable SATA Device SATA Controller Speed Indicates the maximum speed the SATA controller can support SATA Port 1 Port 1 Enable or Disable...

Page 60: ...iguration Figure 3 32 USB Configuration XHCI Disable Compliance Mode Options to disable Compliance Mode Default is False which does not disable Compliance Mode Set to TRUE to disable Compliance Mode X...

Page 61: ...onfiguration Figure 3 33 Security Configuration RTC Memory Lock Enable will lock bytes 38h 3Fh in the lower upper 126 byte bank of RTC RAM BIOS Lock Enable Disable the PCH BIOS lock enable feature Req...

Page 62: ...guration Settings Figure 3 34 HD Audio Subsystem Configuration Settings HD Audio Control Detection of the HD Audio device Disabled HDA will be uncondi tionally disabled Enabled HAD will be uncondition...

Page 63: ...is function0 PSF dis abling is skipped PSF default will remain and device PCI CFG space will still be visible This is needed to allow PCI enumerator access functions above 0 in a multifunction device...

Page 64: ...54 be visible This is needed to allow PCI enumerator access functions above 0 in a multifunction device Serial IO I2C0 Settings Figure 3 36 Serial IO I2C0 Settings Set Serial IO I2C 0 Speed Select se...

Page 65: ...32 User Manual Chapter 3 AMI BIOS Serial IO I2C2 Settings Figure 3 37 Serial IO I2C2 Settings Set Serial IO I2C 2 Speed Select serial IO I2C 2 speed Serial IO I2C3 Settings Figure 3 38 Serial IO I2C3...

Page 66: ...SOM 2532 User Manual 56 Set Serial IO I2C 3 Speed Select serial IO I2C 3 speed Serial IO I2C4 Settings Figure 3 39 Serial IO I2C4 Settings Set Serial IO I2C 4 Speed Select serial IO I2C 4 speed...

Page 67: ...PI delayed Rx clock option As is Default internal Internally delayed Tx Clock Negative edge of Tx clock Rx Clock Negative edge of delayed Ex clock Chip Select0 This enabled SPI device for testing purp...

Page 68: ...de Enable or Disable SCS eMMC 5 1 HS400 Mode Enable HS400 software tuning Software tuning should improve eMMC HS400 stability at the expense of boot time Driver Strength Sets I O driver strength eMMC...

Page 69: ...T0 Settings Figure 3 41 Serial IO UART0 Settings Hardware flow control When enabled configures additional 2 GPIO pads for use as RTS CTS sig nals for UART DMA enable Enabled UART OS driver will use DM...

Page 70: ...gs Figure 3 42 Serial IO UART2 Settings Hardware flow control When enabled configures additional 2 GPIO pads for use as RTS CTS sig nals for UART DMA enable Enabled UART OS driver will use DMA when po...

Page 71: ...ard Enable Disable PSE Add In Card I2S0 I2S0 has pin conflict with CAN0 CAN1 TGPIO 14 17 I2S1 does not have conflict If it is grayed out check the above options The same pin cannot be assigned to mult...

Page 72: ...pose UART3 has conflict with GBE0 1 PWM and TGPIO HSUART1 RS485 Select this to enable UART to support HSUART RS485 Each HSUART pin conflict dependency is similar to UART Figure 3 44 PSE Controller UAR...

Page 73: ...o host owned because I2C7 is the function 0 of this device If it is grayed out check the above options The same pin cannot be assigned to multiple IP QEP3 To assign this device to host owned you must...

Page 74: ...onflict with PWM I2C6 has no pin conflict Figure 3 45 PSE Controller I2C7 If I2C7 is not set to host owned all PSE CAN and QEP devices could not be set to host owned too due to sharing same function I...

Page 75: ...t with I2S0 and TGPIO 14 15 If it is grayed out check the above options CAN1 To assign this device to host owned you must enable PSE I2C7 to host owned because I2C7 is the function 0 of this device CA...

Page 76: ...terrupt assignment configuration Checked Interrupt set to SB mode Default unchecked is MSI mode I2S0 Checked Interrupt set to SB mode Default unchecked is MSI mode I2S1 Checked Interrupt set to SB mod...

Page 77: ...I mode HSUART3 Checked Interrupt set to SB mode Default unchecked is MSI mode QEP0 Checked Interrupt set to SB mode Default unchecked is MSI mode QEP1 Checked Interrupt set to SB mode Default unchecke...

Page 78: ...Interrupt set to SB mode Default unchecked is MSI mode SPI2 Checked Interrupt set to SB mode Default unchecked is MSI mode SPI3 Checked Interrupt set to SB mode Default unchecked is MSI mode DMA0 Chec...

Page 79: ...d configuration PCH TSN GBE 0 Multi Vc Enable Disable TSN Multi Virtual Channels TSN GBE must be host owned PSE TSN GBE 0 SGMII Support Enable Disable Modphy support for SGMII mode for PSE TSN GBE 0 P...

Page 80: ...e IFWI has proper straps set for SGMII Make sure Flex IO Lane Assignment is not NONE PSE TSN GBE 1 Link Speed PSE TSN GBE 1 Link Speed configuration 3 2 4 Security Chipset Figure 3 49 Security Chipset...

Page 81: ...wait for setup activation key 65535 0xFFFF means indefinite waiting Bootup NumLock State Select the keyboard NumLock state Quiet Boot Enables or disables Quiet Boot option Boot Option Priorities Boot...

Page 82: ...aving any changes Save Changes and Reset Reset the system after saving the changes Discard Changes and Reset Reset system setup without saving any changes Default Options Restore Defaults Restore Load...

Page 83: ...Chapter 4 4 S W Introduction and Installation S W Introduction Driver Installation Advantech iManager SUSI 4...

Page 84: ...to make Windows Embedded Software solu tions easily and widely available to the embedded computing community 4 2 Driver Installation The Intel Chipset Software Installation CSI utility installs the Wi...

Page 85: ...and provide an advanced watchdog to handle errors just as they happen iManager also comes with a secure encrypted EEPROM for storing important security key or other customer define information All th...

Page 86: ...SOM 2532 User Manual 76...

Page 87: ...Appendix A A Pin Assignment This appendix gives you the infor mation about the hardware pin assignment of the SOM 2532 CPU System on Module Sections include SOM 2532 Pin Assignment...

Page 88: ...32 LVDS0_2 eDP0_TX2 DSI0_D2 v v v S137 LVDS0_3 eDP0_TX3 DSI0_D3 v v v S138 LVDS0_3 eDP0_TX3 DSI0_D3 v v v S134 LVDS0_CK eDP0_AUX DSI0_CLK v v v S135 LVDS0_CK eDP0_AUX DSI0_CLK v v v S111 LVDS1_0 eDP1_...

Page 89: ...0 v v P99 DP1_LANE2 HDMI_D0 v v P101 DP1_LANE3 HDMI_CK v v P102 DP1_LANE3 HDMI_CK v v P104 DP1_HPD HDMI_HPD v v P105 DP1_AUX HDMI_CTRL_DAT v v P106 DP1_AUX HDMI_CTRL_CK v v P107 DP1_AUX_SEL v DP S102...

Page 90: ...S14 CSI0_RX1 S15 CSI0_RX1 P7 CSI1_RX0 P8 CSI1_RX0 P10 CSI1_RX1 P11 CSI1_RX1 P13 CSI1_RX2 P14 CSI1_RX2 P16 CSI1_RX3 P17 CSI1_RX3 S8 CSI0_CK S9 CSI0_CK P3 CSI1_CK P4 CSI1_CK S6 CAM_MCK SDIO Card P39 SD...

Page 91: ...ALERT1 v I2S S39 I2S0_LRCK v S40 I2S0_SDOUT v S41 I2S0_SDIN v S42 I2S0_CK v S38 AUDIO_MCK v HDA I2S S50 HDA_SYNC I2S2_LRCK v S51 HDA_SDO I2S2_SDOUT v S52 HDA_SDI I2S2_SDIN v S53 HDA_CK I2S2_CK v P112...

Page 92: ...6 USB4 v S59 USB5 v S60 USB5 v P62 USB0_EN_OC v P67 USB1_EN_OC v P71 USB2_EN_OC v P74 USB3_EN_OC v P76 USB4_EN_OC v S55 USB5_EN_OC v P63 USB0_VBUS_DET v S37 USB3_VBUS_DET v P64 USB0_OTG_ID v S104 USB3...

Page 93: ...86 PCIE_A_RX v P87 PCIE_A_RX v S87 PCIE_B_RX v S88 PCIE_B_RX v S78 PCIE_C_RX SERDES_1_RX v v S79 PCIE_C_RX SERDES_1_RX v v S32 PCIE_D_RX SERDES_0_RX v v S33 PCIE_D_RX SERDES_0_RX v v P83 PCIE_A_REFCK...

Page 94: ...27 GBE1_MDI3 v P21 GBE0_LINK100 v S19 GBE0_LINK100 v P22 GBE0_LINK1000 v S22 GBE1_LINK1000 v P25 GBE0_LINK_ACT v s31 GBE1_LINK_ACT v P28 GBE0_CTREF v S28 GBE1_CTREF P6 GBE0_SDP P5 GBE1_SDP Watchdog S1...

Page 95: ...S152 CHARGER_PRSNT v S157 TEST v P1 SMB_ALERT v Boot Select P123 BOOT_SEL0 P124 BOOT_SEL0 P125 BOOT_SEL2 v S155 FORCE_RECOV v Power GND RSVD S147 VDD_RTC v P147 VDD_IN v P148 VDD_IN v P149 VDD_IN v P...

Page 96: ...GND v S61 GND v S64 GND v S67 GND v S70 GND v S73 GND v S80 GND v S83 GND v S86 GND v S89 GND v S92 GND v S101 GND v S110 GND v S119 GND v S124 GND v S130 GND v S136 GND v S143 GND v P72 RSVD NC P73...

Page 97: ...Appendix B B Watchdog Timer This appendix details information about the watchdog timer pro gramming on the SOM 2532 CPU System on Module Sections include Watchdog Timer Programming...

Page 98: ...rom BIOS and then set to EC Only Win10 support it In other OS it will still use IRQ number from BIOS setting as usual For details please refer to iManager Software API User Manual Trigger Event Note I...

Page 99: ...m Assignments This appendix details information on the system resource alloca tion on the SOM 2532 CPU Sys tem on Module Sections include System I O ports DMA Channel Assignments Interrupt Assignments...

Page 100: ...067 0x00000067 Motherboard resources 0x00000070 0x00000070 Motherboard resources 0x00000080 0x00000080 Motherboard resources 0x00000092 0x00000092 Motherboard resources 0x000000A0 0x000000A1 Programma...

Page 101: ...rosoft ACPI Compliant System IRQ 141 IRQ 150 Microsoft ACPI Compliant System IRQ 151 IRQ 160 Microsoft ACPI Compliant System IRQ 161 IRQ 170 Microsoft ACPI Compliant System IRQ 171 IRQ 180 Microsoft A...

Page 102: ...7289 Intel Management Engine Interface 1 IRQ 4294967290 Intel USB 3 10 eXtensible Host Controller 1 20 Micro soft IRQ 4294967291 Intel UHD Graphics IRQ 4294967292 Intel EC1000R 1 0GbE Connection IRQ 4...

Page 103: ...000 0x13A0FFF SDA Standard Compliant SD Host Controller 0x139E000 0x139E0FF Intel SMBus Controller 4B23 0xFD6E0000 0xFD6EFFFF Intel Serial IO GPIO Host Controller INTC1020 0xFD6D0000 0xFD6DFFFF Intel...

Page 104: ...ions are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion fro...

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