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Chapter 4
4.12 A/D data and channel from FIFO - BASE + 17/18H
(PCM-3718HO only)
The PCM-3718 cards store data from A/D conversions in a 1 K word
First-In-First-Out (FIFO) data buffer. Registers at BASE+17H and
BASE+18H store the channel number and data. The register at
BASE+19H clears the FIFO buffer and sets its empty flag (EF).
AD11 ~ AD0
Analog to digital data
AD0 the least significant bit (LSB) of the A/D data
AD11 the most significant bit (MSB)
C3 ~ C0
A/D channel number from which the data is derived
C0 the least significant bit (LSB) of the channels
C3 the most significant bit (MSB)
Table 4.4: Register for A/D Data and Channel from FIFO
Read
A/D data and channels from FIFO
Bit#
7
6
5
4
3
2
1
0
BASE+17H
AD3
AD2
AD1 AD0 C3
C2
C1
C0
BASE+18H
AD11
AD10
AD9 AD8 AD7 AD6 AD5 AD4
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