CHAPTER 2 INSTALLATION
67
CHAPI.ER 5. ADVANCEDPROGRAMMINGTECHIQUES
5.1. Direct Memory Aocess (DMA)
Direct memory access (DMA) improves system performance by allowing external
devices to directly transfer information to or from the system memory without
operation of the system CPU. Any memory location can source data for DMAand
any read-write memory location can receive data. The IEEE-488 interface data transfer
can be programmed to proceed with or without DMA. When you use DMA, the
IEEE-488 interface provides a number of unique and powerful features.
These features include:
1) The ability to run application programs and DMA simul-taneously.
2) Selection of two DMAoperating modes.
3) The ability to run IEEE-488 DMAand disk DMAsimultaneously.
4) The ability to continuously transmit or receive data blocks of up to 64K bytes
without processor overhead.
These features can significantly improve system performance in applications where
high speed transfers are required or large blocks of data must be moved.
This section describes how DMA works and how you can use it to your advantage. It
also introduces and explains Bit 15 and 14 of gt <setting> of the ieinit( ) procedure
described in Section 4.4.7.
DMA is controlled by the 8237 DMA controller chip on the PC’s system board. It
performs dynamic RAMrefresh, and supports data transfer between floppy disks and
hard disks in addition to serving the IEEE-488 interface.
Like all DMA chips, the 8237 DMAchip is designed to perform one basic function.
That function is to transfer data between memory and 1/0 devices. It performs the
transfer by simultaneously addressing the memory location and VO device and
providing the appropriate read and write signals.
Summary of Contents for PCLS-848-P
Page 1: ...PCLS 848 P IEEE 488 INTERFACE CARD PASCA SUPPORT PACKAGE USER S MANUAL...
Page 6: ...Figures Figuree 7 1 PCL 848A B Block Diagram 77...
Page 10: ...4 PCLS 848 P User s Manual...
Page 20: ...14 PCLS 848 P User s Manual...
Page 32: ...26 PCLS 848 P User s Manual If addr 0 or addr 30 ATN is set false String is entered...
Page 37: ...CHAPTER 2 INSTALLATION 31 ieinit ioport myaddr setting...
Page 42: ...36 PCLS 848 P User s Manual If addr 0 or addr 30 ATN is set false Long string is sent...
Page 56: ...50 PCLS 848 P User s Manual...
Page 80: ...74 PCLS 848 P User s Manual...
Page 83: ...CHAPTER 7 THEORY OF OPERATION 77 Figuree 7 1 PCL 848A B Block Diagram...
Page 84: ...78 PCLS 848 P User s Manual...
Page 95: ...CHAPTER 7 THEORY OF OPERATION 89...
Page 97: ...CHAPTER 7 THEORY OF OPERATION 91 Handshake Timing Sequence...
Page 102: ...96 PCLS 848 P User s Manual...